Merge pull request #1467 from mbedmicro/fix_m7core

Fix m7core
ARMmbed · Jan 11, 2016 · 42ceddf · 42ceddf
2 parents ab7d3f1 + 50719ed
commit 42ceddf
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Showing 11 changed files with 14 additions and 9 deletions.
diff --git a/...ORTEX_M/TARGET_M4/TOOLCHAIN_ARM/HAL_CM4.c → ...TARGET_RTOS_M4_M7/TOOLCHAIN_ARM/HAL_CM4.c b/...ORTEX_M/TARGET_M4/TOOLCHAIN_ARM/HAL_CM4.c → ...TARGET_RTOS_M4_M7/TOOLCHAIN_ARM/HAL_CM4.c
diff --git a/...TEX_M/TARGET_M4/TOOLCHAIN_ARM/SVC_Table.S → ...RGET_RTOS_M4_M7/TOOLCHAIN_ARM/SVC_Table.S b/...TEX_M/TARGET_M4/TOOLCHAIN_ARM/SVC_Table.S → ...RGET_RTOS_M4_M7/TOOLCHAIN_ARM/SVC_Table.S
diff --git a/...ORTEX_M/TARGET_M4/TOOLCHAIN_GCC/HAL_CM4.S → ...TARGET_RTOS_M4_M7/TOOLCHAIN_GCC/HAL_CM4.S b/...ORTEX_M/TARGET_M4/TOOLCHAIN_GCC/HAL_CM4.S → ...TARGET_RTOS_M4_M7/TOOLCHAIN_GCC/HAL_CM4.S
diff --git a/...TEX_M/TARGET_M4/TOOLCHAIN_GCC/SVC_Table.S → ...RGET_RTOS_M4_M7/TOOLCHAIN_GCC/SVC_Table.S b/...TEX_M/TARGET_M4/TOOLCHAIN_GCC/SVC_Table.S → ...RGET_RTOS_M4_M7/TOOLCHAIN_GCC/SVC_Table.S
diff --git a/...ORTEX_M/TARGET_M4/TOOLCHAIN_IAR/HAL_CM4.S → ...TARGET_RTOS_M4_M7/TOOLCHAIN_IAR/HAL_CM4.S b/...ORTEX_M/TARGET_M4/TOOLCHAIN_IAR/HAL_CM4.S → ...TARGET_RTOS_M4_M7/TOOLCHAIN_IAR/HAL_CM4.S
diff --git a/...TEX_M/TARGET_M4/TOOLCHAIN_IAR/SVC_Table.S → ...RGET_RTOS_M4_M7/TOOLCHAIN_IAR/SVC_Table.S b/...TEX_M/TARGET_M4/TOOLCHAIN_IAR/SVC_Table.S → ...RGET_RTOS_M4_M7/TOOLCHAIN_IAR/SVC_Table.S
diff --git a/libraries/rtos/rtx/TARGET_CORTEX_M/rt_CMSIS.c b/libraries/rtos/rtx/TARGET_CORTEX_M/rt_CMSIS.c
@@ -36,6 +36,8 @@
 
 #if defined (__CORTEX_M4) || defined (__CORTEX_M4F)
   #include "core_cm4.h"
+#elif defined (__CORTEX_M7) || defined (__CORTEX_M7F)
+  #include "core_cm7.h"
 #elif defined (__CORTEX_M3)
   #include "core_cm3.h"
 #elif defined (__CORTEX_M0)

diff --git a/workspace_tools/export/uvision4.py b/workspace_tools/export/uvision4.py
@@ -122,7 +122,6 @@ class Uvision4(Exporter):
         'DISCO_F334C8',
         'DISCO_F429ZI',
         'DISCO_F469NI',
-        'DISCO_F746NG',
         'DISCO_L053C8',
         'DISCO_L476VG',
         'B96B_F446VE',

diff --git a/workspace_tools/export/uvision4_disco_f746ng.uvproj.tmpl b/workspace_tools/export/uvision4_disco_f746ng.uvproj.tmpl
@@ -226,7 +226,7 @@
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
-            <useUlib>1</useUlib>
+            <useUlib>0</useUlib>
             <EndSel>0</EndSel>
             <uLtcg>0</uLtcg>
             <RoSelD>3</RoSelD>
@@ -390,7 +390,7 @@
             </VariousControls>
           </Aads>
           <LDads>
-            <umfTarg>1</umfTarg>
+            <umfTarg>0</umfTarg>
             <Ropi>0</Ropi>
             <Rwpi>0</Rwpi>
             <noStLib>0</noStLib>

diff --git a/workspace_tools/targets.py b/workspace_tools/targets.py
@@ -21,10 +21,10 @@
     "Cortex-M0+": ["M0P", "CORTEX_M"],
     "Cortex-M1" : ["M1", "CORTEX_M"],
     "Cortex-M3" : ["M3", "CORTEX_M"],
-    "Cortex-M4" : ["M4", "CORTEX_M"],
-    "Cortex-M4F" : ["M4", "CORTEX_M"],
-    "Cortex-M7" : ["M7", "CORTEX_M"],
-    "Cortex-M7F" : ["M7", "CORTEX_M"],
+    "Cortex-M4" : ["M4", "CORTEX_M", "RTOS_M4_M7"],
+    "Cortex-M4F" : ["M4", "CORTEX_M", "RTOS_M4_M7"],
+    "Cortex-M7" : ["M7", "CORTEX_M", "RTOS_M4_M7"],
+    "Cortex-M7F" : ["M7", "CORTEX_M", "RTOS_M4_M7"],
     "Cortex-A9" : ["A9", "CORTEX_A"]
 }
 
@@ -906,10 +906,9 @@ def __init__(self):
 class DISCO_F746NG(Target):
     def __init__(self):
         Target.__init__(self)
-        self.core = "Cortex-M7"
+        self.core = "Cortex-M7F"
         self.extra_labels = ['STM', 'STM32F7', 'STM32F746', 'STM32F746NG']
         self.supported_toolchains = ["ARM", "uARM", "IAR", "GCC_ARM"]
-        self.default_toolchain = "uARM"
         self.detect_code = ["0815"]
         self.progen_target ='disco-f746ng'
 

diff --git a/workspace_tools/toolchains/gcc.py b/workspace_tools/toolchains/gcc.py
@@ -37,6 +37,8 @@ def __init__(self, target, options=None, notify=None, macros=None, silent=False,
             cpu = "cortex-m0plus"
         elif target.core == "Cortex-M4F":
             cpu = "cortex-m4"
+        elif target.core == "Cortex-M7F":
+            cpu = "cortex-m7"
         else:
             cpu = target.core.lower()
 
@@ -47,6 +49,9 @@ def __init__(self, target, options=None, notify=None, macros=None, silent=False,
         if target.core == "Cortex-M4F":
             self.cpu.append("-mfpu=fpv4-sp-d16")
             self.cpu.append("-mfloat-abi=softfp")
+        elif target.core == "Cortex-M7F":
+            self.cpu.append("-mfpu=fpv5-d16")
+            self.cpu.append("-mfloat-abi=softfp")
 
         if target.core == "Cortex-A9":
             self.cpu.append("-mthumb-interwork")