Cypress: FPGA: gpio test looks like not valid #11835

yarbcy · 2019-11-07T11:12:58Z

Description of defect

Cypress: FPGA: gpio test looks like not valid.

In file TESTS/mbed_hal_fpga_ci_test_shield/gpio/main.cpp line 165:

`
// Initialize GPIO pin as an input, pull-up mode.

memset(&gpio, 0, sizeof gpio);

gpio_init_inout(&gpio, pin, PIN_INPUT, PullUp, 0);

TEST_ASSERT_NOT_EQUAL(0, gpio_is_connected(&gpio));

tester.gpio_write(MbedTester::LogicalPinGPIO0, 0, false);

wait_us(HI_Z_READ_DELAY_US);

TEST_ASSERT_EQUAL_INT(1, gpio_read(&gpio)); // hi-Z, pulled up

gpio_free(&gpio);`

PSoC6 set 0, tester(FPGA) set 0. But expect 1. Test FAILED. It looks like it doesn't make sense.
This test PASSED if set PSOC6 1, tester(FPGA) set 0.

Target(s) affected by this defect ?

Tested on CY8CKIT_062_WIFI_BT

Toolchain(s) (name and version) displaying this defect ?

Tested on GCC_ARM

What version of Mbed-os are you using (tag or sha) ?

Latest

What version(s) of tools are you using. List all that apply (E.g. mbed-cli)

N/A

How is this defect reproduced ?

Always

The text was updated successfully, but these errors were encountered:

yarbcy · 2019-11-07T11:49:19Z

@0xc0170

0xc0170 · 2019-11-07T12:14:18Z

@yarbcy What is not valid in the code snippet above?

cc @mprse

yarbcy · 2019-11-07T12:15:34Z

@yarbcy What is not valid in the code snippet above?

cc @mprse

PSoC6 set 0, tester(FPGA) set 0. But expect 1

0xc0170 · 2019-11-07T12:18:00Z

Isn't it that you write 0 (fpga side), but because of pull up you expect 1 on the actual pin?

This comment explains it : // hi-Z, pulled up

yarbcy · 2019-11-07T12:20:38Z

Isn't it that you write 0 (fpga side), but because of pull up you expect 1 on the actual pin?

This comment explains it : // hi-Z, pulled up

Yes. But PSoC6 also set initial state 0.

yarbcy · 2019-11-07T12:34:44Z

@0xc0170 @mprse
All the rest GPIO test are passed. Except this one.

0xc0170 · 2019-11-07T12:39:27Z

gpio api supports value even for input, it writes to gpio as it claims "for future use if you switch to output". Although as soon as you change the direction, you write a new value so I dont understand the use case for that condition there).
My expectation, once you set pin to input, it goes into Hi-Z state (no matter what you write as a value, it shall be ignored. As soon as you change the direction, the value is preserved and output equals to the value we wrote earlier), and that is what the test also expects. How does it work for failing target? What happens if you set direction to input to the pin itself?

I cant find it in the history why it was there, will need someone else to look at this closer.

yarbcy · 2019-11-07T12:52:22Z

From my point of view:

PSoC6 set PullUp drive mode (Input)
Set gpio_write(0) (I see it on logical analyzer)
Set tester (FPGA) 0
gpio_read() return 0. But expect 1.

mprse · 2019-11-07T12:56:12Z

Test scenario:

Set Mbed GPIO to pulled-up input. Provided value, in this case, is irrelevant.
Set the corresponding pin on the FPGA side to Hi-Z (something like no connection between GPIOs).
Read the Mbed GPIO.
Expect logic 1 since the pin is pulled up.

Maybe pull mode does not work on the cypress board?

yarbcy · 2019-11-07T13:09:23Z

@mprse Cypress support pull mode.

This case is passed if replace gpio_init_inout() -> gpio_init_in_ex()

Could you please help me understand why?

mprse · 2019-11-07T13:24:59Z

void gpio_init_inout(gpio_t *gpio, PinName pin, PinDirection direction, PinMode mode, int value)
{
    if (direction == PIN_INPUT) {
        _gpio_init_in(gpio, pin, mode);
        if (pin != NC) {
            gpio_write(gpio, value);    // we prepare the value in case it is switched later
        }
    } else {
        _gpio_init_out(gpio, pin, mode, value);
    }
}

void gpio_init_in_ex(gpio_t *gpio, PinName pin, PinMode mode)
{
    _gpio_init_in(gpio, pin, mode);
}

gpio_init_inout() calls _gpio_init_in() and gpio_write().
gpio_init_in_ex() calls only _gpio_init_in().

This call to gpio_write() is suspicious. Probably this is done to set the value for the future if the port direction is changed (according to #11835 (comment)).
Maybe the gpio_write() changes the port direction?

yarbcy · 2019-11-07T13:31:17Z

Maybe the gpio_write() changes the port direction?

Looks like no.

But why we have initial state for input pin it should be done for output pin. Right?

0xc0170 · 2019-11-07T13:43:32Z

That is what I dont understand. 😞

anyway, what happens on the pin if you set it to output (it should be floating, no value set?). Is this documented in the reference manual for that MCU ? What is expected behavior for input pin?

In case the pin has different behavior than we expect (@mprse I havent found the behavior defined in the gpio_api header file for this inout function), you can always check in HAL (if pin is output, and something asks to write to the pin, ignore it and keep it floating).

kjbracey · 2019-11-07T13:50:58Z

Looking in apply_config, called from gpio_dir for PSOC6, I see

if (obj->drive_mode == PullUp) {
    gpio_write(obj, 1);
...

Suggesting that the gpio_write control is used to set the pull - presumably it's acting as a "weak drive".

That test (and the init_inout) seems to be assuming that the gpio_write has no effect until the direction is switched.

Seems like achieving that would need a more advanced gpio_write implementation - which is unfortunate as we normally like it to be a nice small inline register write.

mprse · 2019-11-07T14:16:46Z

static inline void gpio_write(gpio_t *obj, int value)
{
    if (obj->direction == CYHAL_GPIO_DIR_OUTPUT) {    <--- set only if output
        MBED_ASSERT(obj->pin != CYHAL_NC_PIN_VALUE);
        cyhal_gpio_write(obj->pin, value != 0);
    }
}

static inline void gpio_set_pull(gpio_t *obj, int value)  <--- new function for setting pull mode
{
    MBED_ASSERT(obj->pin != CYHAL_NC_PIN_VALUE);
    cyhal_gpio_write(obj->pin, value != 0);
}

void apply_config(gpio_t *obj)
{
    MBED_ASSERT(obj->pin != CYHAL_NC_PIN_VALUE);

    cy_rslt_t rslt;
    if (CY_RSLT_SUCCESS != (rslt = cyhal_gpio_configure(obj->pin, obj->direction, obj->drive_mode))) {
        MBED_ERROR(MBED_MAKE_ERROR(MBED_MODULE_DRIVER_GPIO, CY_RSLT_GET_CODE(rslt)), "cyhal_gpio_configure failed");
    }

    if (obj->drive_mode == PullUp) {
        gpio_set_pull(obj, 1);  <--- use new function for pull mode
    } else if (obj->drive_mode == PullDown) {
        gpio_set_pull(obj, 0);  <--- use new function for pull mode
    }
}

Maybe something like this?

kjbracey · 2019-11-07T14:22:16Z

I think so, but it seems that needs to be extended so that if you're told to write while an input, you should be remembering the written value (in obj, I guess) to write next time you switch to output.

kjbracey · 2019-11-07T14:25:37Z

(I guess that sort of thing is a valid use case, as you could leave the output set to 0 always, then flip between input and output to bitbang I2C, for example, where you only ever drive low)

yarbcy · 2019-11-11T15:33:17Z

@0xc0170 @mprse Do we have some updates?

0xc0170 · 2019-11-11T17:31:52Z

@yarbcy Can you review the proposal above #11835 (comment) ?

yarbcy · 2019-11-12T08:47:02Z

@0xc0170 Looks good. But I m not expert in mbed_hal.

mprse · 2019-11-12T09:48:25Z

@yarbcy Can you test this code?

yarbcy · 2019-11-12T09:55:20Z

@mprse Yes.

yarbcy · 2019-11-13T09:44:10Z

@mprse I tested and it failed communication with FPGA tester: "An MbedTester communication channel could not be created"

mprse · 2019-11-13T09:57:23Z

The communication with the FPGA-test-shield is established using bit-banged SPI communication - based on GPIOs (DigitalInOut). So dealing with GPIO driver may have influence on this.
Can you share your code changes?

yarbcy · 2019-11-13T10:16:16Z

I replaced cy_gpio_api.c line 32 apply_config():

void apply_config(gpio_t *obj)
{
MBED_ASSERT(obj->pin != CYHAL_NC_PIN_VALUE);

cy_rslt_t rslt;
if (CY_RSLT_SUCCESS != (rslt = cyhal_gpio_configure(obj->pin, obj->direction, obj->drive_mode))) {
    MBED_ERROR(MBED_MAKE_ERROR(MBED_MODULE_DRIVER_GPIO, CY_RSLT_GET_CODE(rslt)), "cyhal_gpio_configure failed");
}

if (obj->drive_mode == PullUp) {
    gpio_set_pull(obj, 1);  <--- use new function for pull mode
} else if (obj->drive_mode == PullDown) {
    gpio_set_pull(obj, 0);  <--- use new function for pull mode
}

}

Replaced gpio_object.h line 59 gpio_write():

static inline void gpio_write(gpio_t *obj, int value)
{
if (obj->direction == CYHAL_GPIO_DIR_OUTPUT) { <--- set only if output
MBED_ASSERT(obj->pin != CYHAL_NC_PIN_VALUE);
cyhal_gpio_write(obj->pin, value != 0);
}
}

Added new after gpio_write():

static inline void gpio_set_pull(gpio_t *obj, int value) <--- new function for setting pull mode
{
MBED_ASSERT(obj->pin != CYHAL_NC_PIN_VALUE);
cyhal_gpio_write(obj->pin, value != 0);
}

ciarmcom · 2019-11-13T16:33:46Z

Internal Jira reference: https://jira.arm.com/browse/MBOTRIAGE-2322

yarbcy · 2019-11-14T08:29:43Z

@mprse My proposal for code change is:

mbed-os/hal/mbed_gpio.c remove line 63-65 because initial value doesn't make sense when pin direction is in input direction.

kjbracey · 2019-11-14T08:56:12Z

mbed-os/hal/mbed_gpio.c remove line 63-65 because initial value doesn't make sense when pin direction is in input direction.

As I noted in my example above, there is a use-case for this. Set the output to low, and flip between input and output to manually bit-bang an I2C open-drain output.

That would be efficient on a chip with "OUT" and "DIR" registers where OUT was ignored when DIR was set to input.

I don't know whether any Mbed application in the word is currently doing this, but it does currently work, those lines 63-65 seem to be intended for that, and that test makes sure it works.

kjbracey · 2019-11-14T09:00:46Z

Annoyingly, the commit that added lines 63-65 (be8bca4) only has the commit message "proposed change of gpio_api", so it's not 100% clear what they were intending. But it was deliberate.

yarbcy · 2019-11-14T09:08:26Z

@kjbracey-arm I don't understand next steps. If you don't agree (line 63-65). Please propose your approach.

kjbracey · 2019-11-14T09:57:59Z

My suggestion is roughly as @mprse suggested above, but with the addition as I stated:

if you're told to write while an input, you should be remembering the written value (in obj, I guess) to write next time you switch to output.

yarbcy · 2019-11-14T10:46:32Z

@mprse @0xc0170 Could you please take a look?

0xc0170 · 2019-11-14T10:55:49Z

@yarbcy @mprse will update the suggestion above with written value storing, it will be good to take this to PR to propose a change. It should fix the failures you have been seeing

Annoyingly, the commit that added lines 63-65 (be8bca4) only has the commit message "proposed change of gpio_api", so it's not 100% clear what they were intending. But it was deliberate.

👍 , the comment in the PR itself states something similar about the intention #198 (comment) . Sadly, this is not included in the commit itself

yarbcy · 2019-11-14T11:06:16Z

@mprse I don't have clear understanding what needs to be done. Can you do these changes?

mprse · 2019-11-14T11:10:00Z

I will create a fix proposition.

mprse · 2019-11-14T14:06:18Z

The fix can be found here: PR #11867

yarbcy · 2019-11-15T08:55:10Z

@mprse I tested. All GPIO tests PASSED.

But please fix in file gpio_object.h line 66: change '==' to '='.

[1573807873.51][CONN][RXD] >>> Running case #1: 'generic init, input & output'...
[1573807873.56][CONN][INF] found KV pair in stream: {{__testcase_start;generic init, input & output}}, queued...
[1573807873.59][CONN][RXD] Skipping IO pin D0 (327680)
[1573807873.62][CONN][RXD] Skipping IO pin D1 (327681)
[1573807873.64][CONN][RXD] Skipping IO pin D2 (327682)
[1573807873.67][CONN][RXD] Skipping IO pin D3 (327683)
[1573807873.71][CONN][RXD] Skipping IO pin D11 (786432)
[1573807873.74][CONN][RXD] Skipping IO pin D12 (786433)
[1573807873.77][CONN][RXD] Skipping IO pin D13 (786434)
[1573807873.80][CONN][RXD] Skipping IO pin D14 (393217)
[1573807873.83][CONN][RXD] Skipping IO pin D15 (393216)
[1573807873.88][CONN][RXD] Testing GPIO on all form factor ports
[1573807873.95][CONN][RXD] D4 - IO pin tested on port: peripheral=(0) IO=(D4) ...succeeded
[1573807874.01][CONN][RXD] D5 - IO pin tested on port: peripheral=(0) IO=(D5) ...succeeded
[1573807874.09][CONN][RXD] D6 - IO pin tested on port: peripheral=(0) IO=(D6) ...succeeded
[1573807874.15][CONN][RXD] D7 - IO pin tested on port: peripheral=(0) IO=(D7) ...succeeded
[1573807874.21][CONN][RXD] D8 - IO pin tested on port: peripheral=(0) IO=(D8) ...succeeded
[1573807874.29][CONN][RXD] D9 - IO pin tested on port: peripheral=(0) IO=(D9) ...succeeded
[1573807874.35][CONN][RXD] D10 - IO pin tested on port: peripheral=(0) IO=(D10) ...succeeded
[1573807874.42][CONN][RXD] A0 - IO pin tested on port: peripheral=(0) IO=(A0) ...succeeded
[1573807874.49][CONN][RXD] A1 - IO pin tested on port: peripheral=(0) IO=(A1) ...succeeded
[1573807874.56][CONN][RXD] A2 - IO pin tested on port: peripheral=(0) IO=(A2) ...succeeded
[1573807874.62][CONN][RXD] A3 - IO pin tested on port: peripheral=(0) IO=(A3) ...succeeded
[1573807874.69][CONN][RXD] A4 - IO pin tested on port: peripheral=(0) IO=(A4) ...succeeded
[1573807874.76][CONN][RXD] A5 - IO pin tested on port: peripheral=(0) IO=(A5) ...succeeded
[1573807874.81][CONN][INF] found KV pair in stream: {{__testcase_finish;generic init, input & output;1;0}}, queued...
[1573807874.88][CONN][RXD] >>> 'generic init, input & output': 1 passed, 0 failed
[1573807874.88][CONN][RXD]
[1573807874.93][CONN][RXD] >>> Running case #2: 'explicit init, input'...
[1573807874.97][CONN][INF] found KV pair in stream: {{__testcase_start;explicit init, input}}, queued...
[1573807875.00][CONN][RXD] Skipping IO pin D0 (327680)
[1573807875.02][CONN][RXD] Skipping IO pin D1 (327681)
[1573807875.05][CONN][RXD] Skipping IO pin D2 (327682)
[1573807875.09][CONN][RXD] Skipping IO pin D3 (327683)
[1573807875.12][CONN][RXD] Skipping IO pin D11 (786432)
[1573807875.15][CONN][RXD] Skipping IO pin D12 (786433)
[1573807875.18][CONN][RXD] Skipping IO pin D13 (786434)
[1573807875.21][CONN][RXD] Skipping IO pin D14 (393217)
[1573807875.24][CONN][RXD] Skipping IO pin D15 (393216)
[1573807875.29][CONN][RXD] Testing GPIO on all form factor ports
[1573807875.36][CONN][RXD] D4 - IO pin tested on port: peripheral=(0) IO=(D4) ...succeeded
[1573807875.42][CONN][RXD] D5 - IO pin tested on port: peripheral=(0) IO=(D5) ...succeeded
[1573807875.50][CONN][RXD] D6 - IO pin tested on port: peripheral=(0) IO=(D6) ...succeeded
[1573807875.56][CONN][RXD] D7 - IO pin tested on port: peripheral=(0) IO=(D7) ...succeeded
[1573807875.62][CONN][RXD] D8 - IO pin tested on port: peripheral=(0) IO=(D8) ...succeeded
[1573807875.70][CONN][RXD] D9 - IO pin tested on port: peripheral=(0) IO=(D9) ...succeeded
[1573807875.76][CONN][RXD] D10 - IO pin tested on port: peripheral=(0) IO=(D10) ...succeeded
[1573807875.83][CONN][RXD] A0 - IO pin tested on port: peripheral=(0) IO=(A0) ...succeeded
[1573807875.90][CONN][RXD] A1 - IO pin tested on port: peripheral=(0) IO=(A1) ...succeeded
[1573807875.97][CONN][RXD] A2 - IO pin tested on port: peripheral=(0) IO=(A2) ...succeeded
[1573807876.03][CONN][RXD] A3 - IO pin tested on port: peripheral=(0) IO=(A3) ...succeeded
[1573807876.10][CONN][RXD] A4 - IO pin tested on port: peripheral=(0) IO=(A4) ...succeeded
[1573807876.17][CONN][RXD] A5 - IO pin tested on port: peripheral=(0) IO=(A5) ...succeeded
[1573807876.22][CONN][INF] found KV pair in stream: {{__testcase_finish;explicit init, input;1;0}}, queued...
[1573807876.26][CONN][RXD] >>> 'explicit init, input': 1 passed, 0 failed
[1573807876.26][CONN][RXD]
[1573807876.32][CONN][RXD] >>> Running case #3: 'explicit init, output'...
[1573807876.37][CONN][INF] found KV pair in stream: {{__testcase_start;explicit init, output}}, queued...
[1573807876.39][CONN][RXD] Skipping IO pin D0 (327680)
[1573807876.42][CONN][RXD] Skipping IO pin D1 (327681)
[1573807876.45][CONN][RXD] Skipping IO pin D2 (327682)
[1573807876.48][CONN][RXD] Skipping IO pin D3 (327683)
[1573807876.51][CONN][RXD] Skipping IO pin D11 (786432)
[1573807876.55][CONN][RXD] Skipping IO pin D12 (786433)
[1573807876.58][CONN][RXD] Skipping IO pin D13 (786434)
[1573807876.61][CONN][RXD] Skipping IO pin D14 (393217)
[1573807876.64][CONN][RXD] Skipping IO pin D15 (393216)
[1573807876.69][CONN][RXD] Testing GPIO on all form factor ports
[1573807876.75][CONN][RXD] D4 - IO pin tested on port: peripheral=(0) IO=(D4) ...succeeded
[1573807876.82][CONN][RXD] D5 - IO pin tested on port: peripheral=(0) IO=(D5) ...succeeded
[1573807876.89][CONN][RXD] D6 - IO pin tested on port: peripheral=(0) IO=(D6) ...succeeded
[1573807876.95][CONN][RXD] D7 - IO pin tested on port: peripheral=(0) IO=(D7) ...succeeded
[1573807877.02][CONN][RXD] D8 - IO pin tested on port: peripheral=(0) IO=(D8) ...succeeded
[1573807877.09][CONN][RXD] D9 - IO pin tested on port: peripheral=(0) IO=(D9) ...succeeded
[1573807877.15][CONN][RXD] D10 - IO pin tested on port: peripheral=(0) IO=(D10) ...succeeded
[1573807877.23][CONN][RXD] A0 - IO pin tested on port: peripheral=(0) IO=(A0) ...succeeded
[1573807877.29][CONN][RXD] A1 - IO pin tested on port: peripheral=(0) IO=(A1) ...succeeded
[1573807877.36][CONN][RXD] A2 - IO pin tested on port: peripheral=(0) IO=(A2) ...succeeded
[1573807877.43][CONN][RXD] A3 - IO pin tested on port: peripheral=(0) IO=(A3) ...succeeded
[1573807877.49][CONN][RXD] A4 - IO pin tested on port: peripheral=(0) IO=(A4) ...succeeded
[1573807877.57][CONN][RXD] A5 - IO pin tested on port: peripheral=(0) IO=(A5) ...succeeded
[1573807877.61][CONN][INF] found KV pair in stream: {{__testcase_finish;explicit init, output;1;0}}, queued...
[1573807877.66][CONN][RXD] >>> 'explicit init, output': 1 passed, 0 failed
[1573807877.66][CONN][RXD]
[1573807877.70][CONN][RXD] >>> Test cases: 3 passed, 0 failed

mprse · 2019-11-15T09:15:26Z

Great news! 🎉

But please fix in file gpio_object.h line 66: change '==' to '='.

Fixed! Thanks for catching this.

BTW. Probably the previous implementation faulty because the direction check was invalid:

static inline void gpio_write(gpio_t *obj, int value)
{
    if (obj->direction == CYHAL_GPIO_DIR_OUTPUT) {    <--- issue: when output direction is set to CYHAL_GPIO_DIR_BIDIRECTIONAL
        MBED_ASSERT(obj->pin != CYHAL_NC_PIN_VALUE);
        cyhal_gpio_write(obj->pin, value != 0);
    }
}

Fix for Cypress GPIO driver (fix for issue #11835)

yarbcy · 2019-11-19T09:22:33Z

All GPIO tests are PASSED.

[1574155268.32][CONN][RXD] >>> Running case #1: 'generic init, input & output'...
[1574155268.38][CONN][INF] found KV pair in stream: {{__testcase_start;generic init, input & output}}, queued...
[1574155268.41][CONN][RXD] Skipping IO pin D0 (327680)
[1574155268.44][CONN][RXD] Skipping IO pin D1 (327681)
[1574155268.46][CONN][RXD] Skipping IO pin D2 (327682)
[1574155268.50][CONN][RXD] Skipping IO pin D3 (327683)
[1574155268.53][CONN][RXD] Skipping IO pin D11 (786432)
[1574155268.56][CONN][RXD] Skipping IO pin D12 (786433)
[1574155268.59][CONN][RXD] Skipping IO pin D13 (786434)
[1574155268.62][CONN][RXD] Skipping IO pin D14 (393217)
[1574155268.66][CONN][RXD] Skipping IO pin D15 (393216)
[1574155268.70][CONN][RXD] Testing GPIO on all form factor ports
[1574155268.76][CONN][RXD] D4 - IO pin tested on port: peripheral=(0) IO=(D4) ...succeeded
[1574155268.84][CONN][RXD] D5 - IO pin tested on port: peripheral=(0) IO=(D5) ...succeeded
[1574155268.90][CONN][RXD] D6 - IO pin tested on port: peripheral=(0) IO=(D6) ...succeeded
[1574155268.96][CONN][RXD] D7 - IO pin tested on port: peripheral=(0) IO=(D7) ...succeeded
[1574155269.04][CONN][RXD] D8 - IO pin tested on port: peripheral=(0) IO=(D8) ...succeeded
[1574155269.10][CONN][RXD] D9 - IO pin tested on port: peripheral=(0) IO=(D9) ...succeeded
[1574155269.17][CONN][RXD] D10 - IO pin tested on port: peripheral=(0) IO=(D10) ...succeeded
[1574155269.24][CONN][RXD] A0 - IO pin tested on port: peripheral=(0) IO=(A0) ...succeeded
[1574155269.31][CONN][RXD] A1 - IO pin tested on port: peripheral=(0) IO=(A1) ...succeeded
[1574155269.38][CONN][RXD] A2 - IO pin tested on port: peripheral=(0) IO=(A2) ...succeeded
[1574155269.44][CONN][RXD] A3 - IO pin tested on port: peripheral=(0) IO=(A3) ...succeeded
[1574155269.51][CONN][RXD] A4 - IO pin tested on port: peripheral=(0) IO=(A4) ...succeeded
[1574155269.57][CONN][RXD] A5 - IO pin tested on port: peripheral=(0) IO=(A5) ...succeeded
[1574155269.64][CONN][INF] found KV pair in stream: {{__testcase_finish;generic init, input & output;1;0}}, queued...
[1574155269.69][CONN][RXD] >>> 'generic init, input & output': 1 passed, 0 failed
[1574155269.69][CONN][RXD]
[1574155269.74][CONN][RXD] >>> Running case #2: 'explicit init, input'...
[1574155269.79][CONN][INF] found KV pair in stream: {{__testcase_start;explicit init, input}}, queued...
[1574155269.82][CONN][RXD] Skipping IO pin D0 (327680)
[1574155269.85][CONN][RXD] Skipping IO pin D1 (327681)
[1574155269.88][CONN][RXD] Skipping IO pin D2 (327682)
[1574155269.90][CONN][RXD] Skipping IO pin D3 (327683)
[1574155269.93][CONN][RXD] Skipping IO pin D11 (786432)
[1574155269.97][CONN][RXD] Skipping IO pin D12 (786433)
[1574155270.00][CONN][RXD] Skipping IO pin D13 (786434)
[1574155270.03][CONN][RXD] Skipping IO pin D14 (393217)
[1574155270.06][CONN][RXD] Skipping IO pin D15 (393216)
[1574155270.11][CONN][RXD] Testing GPIO on all form factor ports
[1574155270.18][CONN][RXD] D4 - IO pin tested on port: peripheral=(0) IO=(D4) ...succeeded
[1574155270.24][CONN][RXD] D5 - IO pin tested on port: peripheral=(0) IO=(D5) ...succeeded
[1574155270.31][CONN][RXD] D6 - IO pin tested on port: peripheral=(0) IO=(D6) ...succeeded
[1574155270.37][CONN][RXD] D7 - IO pin tested on port: peripheral=(0) IO=(D7) ...succeeded
[1574155270.45][CONN][RXD] D8 - IO pin tested on port: peripheral=(0) IO=(D8) ...succeeded
[1574155270.51][CONN][RXD] D9 - IO pin tested on port: peripheral=(0) IO=(D9) ...succeeded
[1574155270.58][CONN][RXD] D10 - IO pin tested on port: peripheral=(0) IO=(D10) ...succeeded
[1574155270.65][CONN][RXD] A0 - IO pin tested on port: peripheral=(0) IO=(A0) ...succeeded
[1574155270.72][CONN][RXD] A1 - IO pin tested on port: peripheral=(0) IO=(A1) ...succeeded
[1574155270.78][CONN][RXD] A2 - IO pin tested on port: peripheral=(0) IO=(A2) ...succeeded
[1574155270.86][CONN][RXD] A3 - IO pin tested on port: peripheral=(0) IO=(A3) ...succeeded
[1574155270.92][CONN][RXD] A4 - IO pin tested on port: peripheral=(0) IO=(A4) ...succeeded
[1574155270.98][CONN][RXD] A5 - IO pin tested on port: peripheral=(0) IO=(A5) ...succeeded
[1574155271.04][CONN][INF] found KV pair in stream: {{__testcase_finish;explicit init, input;1;0}}, queued...
[1574155271.09][CONN][RXD] >>> 'explicit init, input': 1 passed, 0 failed
[1574155271.09][CONN][RXD]
[1574155271.14][CONN][RXD] >>> Running case #3: 'explicit init, output'...
[1574155271.18][CONN][INF] found KV pair in stream: {{__testcase_start;explicit init, output}}, queued...
[1574155271.22][CONN][RXD] Skipping IO pin D0 (327680)
[1574155271.25][CONN][RXD] Skipping IO pin D1 (327681)
[1574155271.27][CONN][RXD] Skipping IO pin D2 (327682)
[1574155271.30][CONN][RXD] Skipping IO pin D3 (327683)
[1574155271.33][CONN][RXD] Skipping IO pin D11 (786432)
[1574155271.36][CONN][RXD] Skipping IO pin D12 (786433)
[1574155271.39][CONN][RXD] Skipping IO pin D13 (786434)
[1574155271.43][CONN][RXD] Skipping IO pin D14 (393217)
[1574155271.46][CONN][RXD] Skipping IO pin D15 (393216)
[1574155271.51][CONN][RXD] Testing GPIO on all form factor ports
[1574155271.57][CONN][RXD] D4 - IO pin tested on port: peripheral=(0) IO=(D4) ...succeeded
[1574155271.65][CONN][RXD] D5 - IO pin tested on port: peripheral=(0) IO=(D5) ...succeeded
[1574155271.71][CONN][RXD] D6 - IO pin tested on port: peripheral=(0) IO=(D6) ...succeeded
[1574155271.77][CONN][RXD] D7 - IO pin tested on port: peripheral=(0) IO=(D7) ...succeeded
[1574155271.85][CONN][RXD] D8 - IO pin tested on port: peripheral=(0) IO=(D8) ...succeeded
[1574155271.91][CONN][RXD] D9 - IO pin tested on port: peripheral=(0) IO=(D9) ...succeeded
[1574155271.98][CONN][RXD] D10 - IO pin tested on port: peripheral=(0) IO=(D10) ...succeeded
[1574155272.04][CONN][RXD] A0 - IO pin tested on port: peripheral=(0) IO=(A0) ...succeeded
[1574155272.12][CONN][RXD] A1 - IO pin tested on port: peripheral=(0) IO=(A1) ...succeeded
[1574155272.18][CONN][RXD] A2 - IO pin tested on port: peripheral=(0) IO=(A2) ...succeeded
[1574155272.25][CONN][RXD] A3 - IO pin tested on port: peripheral=(0) IO=(A3) ...succeeded
[1574155272.32][CONN][RXD] A4 - IO pin tested on port: peripheral=(0) IO=(A4) ...succeeded
[1574155272.38][CONN][RXD] A5 - IO pin tested on port: peripheral=(0) IO=(A5) ...succeeded
[1574155272.44][CONN][INF] found KV pair in stream: {{__testcase_finish;explicit init, output;1;0}}, queued...
[1574155272.49][CONN][RXD] >>> 'explicit init, output': 1 passed, 0 failed
[1574155272.49][CONN][RXD]
[1574155272.52][CONN][RXD] >>> Test cases: 3 passed, 0 failed

ciarmcom added type: bug Jira status: OPEN labels Nov 13, 2019

mprse mentioned this issue Nov 14, 2019

Fix for Cypress GPIO driver (fix for issue #11835) #11867

Merged

0xc0170 added a commit that referenced this issue Nov 19, 2019

Merge pull request #11867 from mprse/cypress_gpio_fix

a183033

Fix for Cypress GPIO driver (fix for issue #11835)

yarbcy closed this as completed Nov 19, 2019

adbridge added Jira status: CLOSED and removed Jira status: OPEN labels Nov 25, 2019

Cypress: FPGA: gpio test looks like not valid #11835

Cypress: FPGA: gpio test looks like not valid #11835

Comments

yarbcy commented Nov 7, 2019 • edited Loading

Description of defect

Target(s) affected by this defect ?

Toolchain(s) (name and version) displaying this defect ?

What version of Mbed-os are you using (tag or sha) ?

What version(s) of tools are you using. List all that apply (E.g. mbed-cli)

How is this defect reproduced ?

yarbcy commented Nov 7, 2019

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yarbcy commented Nov 7, 2019 •

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