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UBLOX EVK NINA B1: mbed 5.5 regression on Serial class (nrf5) #4686
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It would help if you can git bisect it. At least to find a revision that worked for you. I assume 5.5.0 worked, 5.5.1 broke it or? Looking at the git log, I can see this commit - 080c5af that is touching serial in the recent history. Is this one that has affected your code base? I can see it is defined in nina target PinNames, is it correctly set ? cc @nvlsianpu |
Hi, I tested the code above on the latest master i.e. d382d44 and it seems to work. The fix done by @nvlsianpu is actually fixing the issue that is reported. The commit c9e63f1 is earlier in the history before the fix. |
@andreaslarssonublox @0xc0170 commit c9e63f1 is what you get if you run 'mbed new' (at least as of today, 3rd Jul 2017, 1500:Z) so it's not like I've just taken a random build. :-( Running 'mbed update d382d44 ' inside the mbed-os folder then 'git log -n 1' shows "commit d382d44". Rebuilding with "mbed compile -c" and reflashing the device, I see exactly the same behaviour unfortunately. (The reason I'm printing out pinnames is because I suspected they might have been accidentally changed but that's not the case for TX and RX. Commenting out the flow-control line makes no difference).
Unfortunately I don't have time to do this right now but can test a couple of 'major' releases if you can tell me the magic 'mbed update' runes. |
On further investigation it appears that the problem does NOT appear (with d382d44) on an actual NINA_B1 but does appear with our own design which emulates the pin out. I suspect this is RTS/CTS related so will look at how our schematic might be different. This is definitely new behaviour since OS4.x though - has anything around this area been changed? Edit UART pin assignments appear unchanged between working and non-working builds... Note, we're using NINA-B112 module. UART_CTS/GPIO_21 is pulled low. UART_RTS/GPIO_20, UART_DSR_PIO_17, UART_DTR/GPIO_16 all NC (floating). Perhaps there has been a change to default configuration of these? Edit |
By the way shouldn't the pins for RTS and CTS be passed as well e.g.: See set_flow_control method in SerialBase.h |
@andreaslarssonublox - yes you are right. These are defaulted to NC which seems.... just a bit counter-intuitive to me (surely they should default to CTS/RTS?). Possibly the reason that bytes are not being received is because the host might be configured to use flow control but since we're pulling CTS low this shouldn't matter. I need to double-check the schematic (can't do this for a few hours) but pretty sure that the CTS pin isn't even connected to our uart header so why would disabling flow control prevent the chip receiving bytes? Perhaps the 'NC' defaults are causing some misconfiguration internally? |
@NeilMacMullen You can disable flow control by default for see: https://developer.mbed.org/teams/Nordic-Semiconductor/wiki/Nordic-platforms-readme#uart-hardware-flow-control-configuration |
@nvlsianpu I'll give that a try later but the main issue here is that 1) the behaviour has clearly changed and 2) the set_flow_control method should work. At this stage I can't even seem to get it to work reliably on the NINA_BA at commit d382d44 using any combination of settings and specifying the pins in set_flow_control. ( pc->set_flow_control(Serial::Disabled,RTS_PIN_NUMBER,CTS_PIN_NUMBER);) I've also tried telling TeraTerm to use hardware on 'none' FC on the host. What is interesting is that the echoed characters are flushed when the nina is reprogrammed using jflashlite. |
Ok, I tried the config suggested in the link from @nvlsianpu That doesn't work for me either on NINA_B1 @ commit d382d44 with teraterm set to 'none' and the application 'set_flow_control' line commented out. Exactly the same source code as above, on exactly the same hardware compiled against mbed @ commit ed4febe works fine |
I can't reproduce this on NRF52_DK @andreaslarssonublox It is possible to reproduce this issue on the NINA_B1x board? (I don't have a such) |
Hi, I have tested the following on the UBLOX_EVK_NINA_B1 and commit d382d44 with the debug profile: Default configuration with HW flow control enabled:
Modified configuration with no HW flow control in mbed_app.json
One thing I saw is that the board might need a restart when switching between flow control modes. This might have to do with the SEGGER J-Link debug chip sensing what mode is being used or what do you think @nvlsianpu? |
SEGGER J-Link cheat a little - it might doesn't work properly without CTS/RTS flow-control. I have tested it again with FTDI232 adapter (so I was sure how wiring looked like and which signals were connected to devices). It have been worked properly for flow both control OFF and ON modes. Then it must have be problem with an UART adapter you used @NeilMacMullen. |
The idea about the on-board debug chip getting confused is interesting and might help explain the B1 behaviour (recall that this originally worked for me but then seemed not to!) On our 'real' hardware which also appears to show the problem, we use a standard FTDI-232 adaptor cable with RTS/CTS not connected to the FTDI. J-Link is wired separately to the SWD pins. I will have some more time tonight so will see if I can come closer to isolating the change that is causing this. |
I have isolated the change that causes this. The code I'm using is...
where id.h is simply At commit 5f9f8c5 the code works as expected, echoing back '@' characters. At the subsequent commit fb8fda3, the code stops echoing characters. Details of the commit are
Note that commit d382d44 also displays the incorrect behaviour so this does not resolve the issue. |
It appears to be the changes to mbed_sleep.h....
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I did wonder if perhaps the chip was relying on the RTS line going active to wake it from sleep so tried using pc->set_flow_control(Serial::RTSCTS,RTS_PIN_NUMBER,CTS_PIN_NUMBER); on the NINA_B1 but still see the same behaviour. |
The board is put to sleep, when RTX calls to idle, between SysTicks (we don't have tickless mode yet), for both develop and release profiles. You can try disabling it by either using |
I'll try this later but surely the device would be expected to wake up on data reception and stay away while data is queued for the uart? |
Any new findings? |
use '--profile debug' causes the application to behave as expected so that at least gives me a workaround for now. However, unless I'm missing something, the uart should be able to work in conjunction with sleep so that still leaves the question of why this isn't working in release mode? |
This is based on TARGET_NRF5 implementation, so we should be able to reproduce it there. cc @pan- @nvlsianpu @anangl please look at this, what might be causing uart to stop working ? |
I applied this change to commit fb8fda3
It does not resolve the issue. (Just be be clear, my application does not appear to be crashing, it just appears to be sleeping though I can see how if the idle thread was broken it might not wake up properly...) |
Any progress on this? |
False, I don't think the flow control is using any interrupt (that could be source of wake up). The regular source of wake up in this case would be rtos timer (for this target it is rtc used instead of systick). thus your target should wake up every 1ms. Is that the case? The question is - does this sleep() has any impact on flow control functionality? As I read above, @nvlsianpu neither @andreaslarssonublox could not reproduce the issue, makes me wonder is this related to the codebase in here or hw setup you have? |
Possibly we are talking at cross purposes here but at this stage the example code is NOT using flow-control. My point was that the (apparent) behaviour is that bytes are arriving on the RF52 UART but failing to be echoed. Even if the RF52 were in deep-sleep, the expected behaviour would be that it would wake when a byte was received (either via hardware interrupt or scheduled tick) then stay awake long enough to flush this byte back out of the output buffer. That's not happening.
I'm fairly sure that the minimal example I gave compiled against the commit I mentioned also fails to behave correctly on the NINA-B1. I will verify that later. Even if the behaviour is different, I think the most plausible explanation is the one that's already been floated which is that the on-board Jlink adaptor may be causing the differences in sleep behaviour. |
Well, the good news is that the loopback behaviour now seems to be correct (just tested on 98ba8ac without '--profile debug'). The bad news is that trying to use an rx callback seems to crash the os*.. Has the use of this API changed? *this can be seen with a slightly less minimal example that flashes an led on a background thread
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I may have been too optimistic in thinking that the original (no loopback) issue was resolved. Here are the results from testing on a stock NINA-B1 board using teraterm, no flow-control.... mbed compile
mbed compile --profile debug
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@andreaslarssonublox @nvlsianpu @anangl Is this known issue for nrf52 targets? |
Hi NeilMacMullen, I tried the above sample code on a NRF51_DK board and did not see any crash. By the way, what crash you are seeing? Can you post it here or provide more details? Thanks, |
First thing that looks wrong in the example is that Serial and RX interrupts are not reading data, therefore would endlessly be stuck in the RX IRQ. This is a problem given that Serial inherits from Stream and retargets to putc and getc which use a Mutex for protection and Mutex + IRQ context is not allowed. (The trap for this failure is not obvious) Secondly there is a problem with nRF devices and flow control being disabled. More on that from @SenRamakri In fact, I think we may need to deprecate attach in the Serial class and in general revisit the Serial classes given their quite a mess right now IMO. Note: RawSerial doesn't have this problem. Could you try this example? Seems to work for me although not sure its what you're after. If you comment the flow control in or out the program will work or fail
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Sam and Senthil. Thanks for your input.. I spent some time with Vincent and Marcelo in Cambridge today, FIndings were....
I'll take a closer look at your suggestions tomorrow. |
Thanks @sg- I've just created a variation of Serial that stubs out lock and unlock and this appears to work.. It's a little unclear what the mutex is meant to be protecting. I assume it's the low-level hardware access? Looking at the RF52 serial_api, the various access functions I care about (serial_readable/writeable/getc/putc) look like they should be interrupt-safe (the main concern I would have would be an incoming byte arriving as I'm calling putc). Do you foresee any issues with removing the locks entirely? |
Why would you want them to be removed?
From the Serial documentation: |
@0xc0170 The reason to remove the locks is to avoid the issue that @sg- raises which is that calling getc in the attach'd rx callback results in an invalid operation. Clearly it makes no sense to selectively remove locks from the getc function (either the design is thread-safe or it's not)!
This doesn't really address my question. :) Yes, obviously the mutex is there to make it thread-safe. The question is why it is not inherently thread-safe without locks. Normally the reason would be that that interleaving register or data structure accesses between rx/tx function would make "bad things happen" (TM). In the specific case of the RF52 serial driver, it looks to me like the register access sequences are actually already thread-safe but not being an expert on the SoC I'm not entirely sure of this, hence the question :-) |
Internal reference: IOTMORF-2319 |
ARM Internal Ref: MBOTRIAGE-312 |
@NeilMacMullen - Can you please let us know if this is still an issue and needs to be investigated as I haven't seen any activity on this issue recently? |
@NeilMacMullen - As I have not received a response, I think this is no longer an issue. I'm closing this issue now, but feel free to re-open if you need this to be investigated more from our side, Thanks for your support. |
This code no longer echoes back received characters on 5.5 (commit c9e63f1) although the initial "LOOPBACK SERIAL" message is shown.
Description
Target
UBLOX_EVK_NINA_B1
Toolchain:
GCC_ARM
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