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Dev kl46z #103

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merged 2 commits into from
Nov 5, 2013
Merged

Dev kl46z #103

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d9ed7ab
CMSIS KL46 files (were KL25 renamed)
0xc0170 Oct 17, 2013
f4591db
Merge branch 'upstream_master' into dev_kl46z
0xc0170 Nov 5, 2013
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2,107 changes: 1,874 additions & 233 deletions libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL46Z/MKL46Z4.h
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46 changes: 26 additions & 20 deletions libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL46Z/system_MKL46Z4.c
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Original file line number Diff line number Diff line change
@@ -1,37 +1,43 @@
/*
** ###################################################################
** Processor: MKL46Z128VLK4
** Processors: MKL46Z256VLH4
** MKL46Z128VLH4
** MKL46Z256VLL4
** MKL46Z128VLL4
** MKL46Z256VMC4
** MKL46Z128VMC4
**
** Compilers: ARM Compiler
** Freescale C/C++ for Embedded ARM
** GNU C Compiler
** IAR ANSI C/C++ Compiler for ARM
**
** Reference manual: KL25RM, Rev.1, Jun 2012
** Version: rev. 1.1, 2012-06-21
** Reference manual: KL46P121M48SF4RM, Rev.1 Draft A, Aug 2012
** Version: rev. 2.0, 2012-12-12
**
** Abstract:
** Provides a system configuration function and a global variable that
** contains the system frequency. It configures the device and initializes
** the oscillator (PLL) that is part of the microcontroller device.
**
** Copyright: 2012 Freescale Semiconductor, Inc. All Rights Reserved.
** Copyright: 2012 Freescale, Inc. All Rights Reserved.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** Revisions:
** - rev. 1.0 (2012-06-13)
** - rev. 1.0 (2012-10-16)
** Initial version.
** - rev. 1.1 (2012-06-21)
** Update according to reference manual rev. 1.
** - rev. 2.0 (2012-12-12)
** Update to reference manual rev. 1.
**
** ###################################################################
*/

/**
* @file MKL46Z4
* @version 1.1
* @date 2012-06-21
* @version 2.0
* @date 2012-12-12
* @brief Device specific configuration file for MKL46Z4 (implementation file)
*
* Provides a system configuration function and a global variable that contains
Expand Down Expand Up @@ -100,8 +106,8 @@ void SystemInit (void) {
/* Switch to FEI Mode */
/* MCG->C1: CLKS=0,FRDIV=0,IREFS=1,IRCLKEN=1,IREFSTEN=0 */
MCG->C1 = (uint8_t)0x06U;
/* MCG_C2: LOCRE0=0,??=0,RANGE0=0,HGO0=0,EREFS0=0,LP=0,IRCS=0 */
MCG->C2 = (uint8_t)0x00U;
/* MCG_C2: LOCRE0=0,RANGE0=0,HGO0=0,EREFS0=0,LP=0,IRCS=0 */
MCG->C2 &= (uint8_t)~(uint8_t)0xBFU;
/* MCG->C4: DMX32=0,DRST_DRS=1 */
MCG->C4 = (uint8_t)((MCG->C4 & (uint8_t)~(uint8_t)0xC0U) | (uint8_t)0x20U);
/* OSC0->CR: ERCLKEN=1,??=0,EREFSTEN=0,??=0,SC2P=0,SC4P=0,SC8P=0,SC16P=0 */
Expand All @@ -124,11 +130,11 @@ void SystemInit (void) {
/* PORTA->PCR19: ISF=0,MUX=0 */
PORTA->PCR[19] &= (uint32_t)~0x01000700UL;
/* Switch to FBE Mode */
/* OSC0->CR: ERCLKEN=1,??=0,EREFSTEN=0,??=0,SC2P=1,SC4P=0,SC8P=0,SC16P=1 */
OSC0->CR = (uint8_t)0x89U;
/* MCG->C2: LOCRE0=0,??=0,RANGE0=2,HGO0=0,EREFS0=1,LP=0,IRCS=0 */
MCG->C2 = (uint8_t)0x24U;
/* MCG->C1: CLKS=2,FRDIV=3,IREFS=0,IRCLKEN=1,IREFSTEN=0 */
/* MCG_C2: LOCRE0=0,RANGE0=2,HGO0=0,EREFS0=1,LP=0,IRCS=0 */
MCG->C2 = (uint8_t)((MCG->C2 & (uint8_t)~(uint8_t)0x9BU) | (uint8_t)0x24U);
/* OSC0->CR: ERCLKEN=1,??=0,EREFSTEN=0,??=0,SC2P=1,SC4P=0,SC8P=0,SC16P=0 */
OSC0->CR = (uint8_t)0x80U;
/* MCG_C1: CLKS=2,FRDIV=3,IREFS=0,IRCLKEN=1,IREFSTEN=0 */
MCG->C1 = (uint8_t)0x9AU;
/* MCG->C4: DMX32=0,DRST_DRS=0 */
MCG->C4 &= (uint8_t)~(uint8_t)0xE0U;
Expand Down Expand Up @@ -162,10 +168,10 @@ void SystemInit (void) {
/* PORTA->PCR19: ISF=0,MUX=0 */
PORTA->PCR[19] &= (uint32_t)~0x01000700UL;
/* Switch to FBE Mode */
/* OSC0->CR: ERCLKEN=1,??=0,EREFSTEN=0,??=0,SC2P=1,SC4P=0,SC8P=0,SC16P=1 */
OSC0->CR = (uint8_t)0x89U;
/* MCG->C2: LOCRE0=0,??=0,RANGE0=2,HGO0=0,EREFS0=1,LP=0,IRCS=0 */
MCG->C2 = (uint8_t)0x24U;
/* OSC0->CR: ERCLKEN=1,??=0,EREFSTEN=0,??=0,SC2P=1,SC4P=0,SC8P=0,SC16P=0 */
OSC0->CR = (uint8_t)0x80U;
/* MCG->C1: CLKS=2,FRDIV=3,IREFS=0,IRCLKEN=1,IREFSTEN=0 */
MCG->C1 = (uint8_t)0x9AU;
/* MCG->C4: DMX32=0,DRST_DRS=0 */
Expand All @@ -179,8 +185,8 @@ void SystemInit (void) {
while((MCG->S & 0x0CU) != 0x08U) { /* Wait until external reference clock is selected as MCG output */
}
/* Switch to BLPE Mode */
/* MCG->C2: LOCRE0=0,??=0,RANGE0=2,HGO0=0,EREFS0=1,LP=1,IRCS=0 */
MCG->C2 = (uint8_t)0x26U;
/* MCG_C2: LOCRE0=0,RANGE0=2,HGO0=0,EREFS0=1,LP=1,IRCS=0 */
MCG->C2 = (uint8_t)((MCG->C2 & (uint8_t)~(uint8_t)0x99U) | (uint8_t)0x26U);
while((MCG->S & 0x0CU) != 0x08U) { /* Wait until external reference clock is selected as MCG output */
}
#endif /* (CLOCK_SETUP == 2) */
Expand Down
24 changes: 15 additions & 9 deletions libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL46Z/system_MKL46Z4.h
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Original file line number Diff line number Diff line change
@@ -1,37 +1,43 @@
/*
** ###################################################################
** Processor: MKL46Z128VLK4
** Processors: MKL46Z256VLH4
** MKL46Z128VLH4
** MKL46Z256VLL4
** MKL46Z128VLL4
** MKL46Z256VMC4
** MKL46Z128VMC4
**
** Compilers: ARM Compiler
** Freescale C/C++ for Embedded ARM
** GNU C Compiler
** IAR ANSI C/C++ Compiler for ARM
**
** Reference manual: KL25RM, Rev.1, Jun 2012
** Version: rev. 1.1, 2012-06-21
** Reference manual: KL46P121M48SF4RM, Rev.1 Draft A, Aug 2012
** Version: rev. 2.0, 2012-12-12
**
** Abstract:
** Provides a system configuration function and a global variable that
** contains the system frequency. It configures the device and initializes
** the oscillator (PLL) that is part of the microcontroller device.
**
** Copyright: 2012 Freescale Semiconductor, Inc. All Rights Reserved.
** Copyright: 2012 Freescale, Inc. All Rights Reserved.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** Revisions:
** - rev. 1.0 (2012-06-13)
** - rev. 1.0 (2012-10-16)
** Initial version.
** - rev. 1.1 (2012-06-21)
** Update according to reference manual rev. 1.
** - rev. 2.0 (2012-12-12)
** Update to reference manual rev. 1.
**
** ###################################################################
*/

/**
* @file MKL46Z4
* @version 1.1
* @date 2012-06-21
* @version 2.0
* @date 2012-12-12
* @brief Device specific configuration file for MKL46Z4 (header file)
*
* Provides a system configuration function and a global variable that contains
Expand Down
2 changes: 1 addition & 1 deletion libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL46Z/objects.h
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Original file line number Diff line number Diff line change
Expand Up @@ -46,7 +46,7 @@ struct pwmout_s {
};

struct serial_s {
UARTLP_Type *uart;
UART0_Type *uart;
int index;
};

Expand Down
6 changes: 3 additions & 3 deletions libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL46Z/serial_api.c
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Original file line number Diff line number Diff line change
Expand Up @@ -71,7 +71,7 @@ void serial_init(serial_t *obj, PinName tx, PinName rx) {
error("Serial pinout mapping failed");
}

obj->uart = (UARTLP_Type *)uart;
obj->uart = (UART0_Type *)uart;
// enable clk
switch (uart) {
case UART_0: SIM->SOPT2 |= SIM_SOPT2_PLLFLLSEL_MASK | (1<<SIM_SOPT2_UART0SRC_SHIFT);
Expand Down Expand Up @@ -200,8 +200,8 @@ void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_b

// enable 10bit mode if needed
if (obj->index == 0) {
obj->uart->C4 &= ~UARTLP_C4_M10_MASK;
obj->uart->C4 |= (m10 << UARTLP_C4_M10_SHIFT);
obj->uart->C4 &= ~UART0_C4_M10_MASK;
obj->uart->C4 |= (m10 << UART0_C4_M10_SHIFT);
}

// stop bits
Expand Down
56 changes: 45 additions & 11 deletions libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL46Z/spi_api.c
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Original file line number Diff line number Diff line change
Expand Up @@ -96,7 +96,7 @@ void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel

// enable power and clocking
switch ((int)obj->spi) {
case SPI_0: SIM->SCGC5 |= 1 << 11; SIM->SCGC4 |= 1 << 22; break;
case SPI_0: SIM->SCGC5 |= 1 << 13; SIM->SCGC4 |= 1 << 22; break;
case SPI_1: SIM->SCGC5 |= 1 << 13; SIM->SCGC4 |= 1 << 23; break;
}

Expand All @@ -110,6 +110,7 @@ void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel

// enable SPI
obj->spi->C1 |= SPI_C1_SPE_MASK;
obj->spi->C2 &= ~SPI_C2_SPIMODE_MASK; //8bit

// pin out the spi pins
pinmap_pinout(mosi, PinMap_SPI_MOSI);
Expand All @@ -124,8 +125,8 @@ void spi_free(spi_t *obj) {
// [TODO]
}
void spi_format(spi_t *obj, int bits, int mode, int slave) {
if (bits != 8) {
error("Only 8bits SPI supported");
if ((bits != 8) && (bits != 16)) {
error("Only 8/16 bits SPI supported");
}

if ((mode < 0) || (mode > 3)) {
Expand All @@ -141,6 +142,11 @@ void spi_format(spi_t *obj, int bits, int mode, int slave) {

// write new value
obj->spi->C1 |= c1_data;
if (bits == 8) {
obj->spi->C2 &= ~SPI_C2_SPIMODE_MASK;
} else {
obj->spi->C2 |= SPI_C2_SPIMODE_MASK;
}
}

void spi_frequency(spi_t *obj, int hz) {
Expand Down Expand Up @@ -184,24 +190,52 @@ static inline int spi_readable(spi_t * obj) {
}

int spi_master_write(spi_t *obj, int value) {
// wait tx buffer empty
while(!spi_writeable(obj));
obj->spi->D = (value & 0xff);
int ret;
if (obj->spi->C2 & SPI_C2_SPIMODE_MASK) {
// 16bit
while(!spi_writeable(obj));
obj->spi->DL = (value & 0xff);
obj->spi->DH = ((value >> 8) & 0xff);

// wait rx buffer full
while (!spi_readable(obj));
ret = obj->spi->DH;
ret = (ret << 8) | obj->spi->DL;
} else {
//8bit
while(!spi_writeable(obj));
obj->spi->DL = (value & 0xff);

// wait rx buffer full
while (!spi_readable(obj));
ret = (obj->spi->DL & 0xff);
}

// wait rx buffer full
while (!spi_readable(obj));
return obj->spi->D & 0xff;
return ret;
}

int spi_slave_receive(spi_t *obj) {
return spi_readable(obj);
}

int spi_slave_read(spi_t *obj) {
return obj->spi->D;
int ret;
if (obj->spi->C2 & SPI_C2_SPIMODE_MASK) {
ret = obj->spi->DH;
ret = ((ret << 8) | obj->spi->DL);
} else {
ret = obj->spi->DL;
}
return ret;
}

void spi_slave_write(spi_t *obj, int value) {
while (!spi_writeable(obj));
obj->spi->D = value;
if (obj->spi->C2 & SPI_C2_SPIMODE_MASK) {
obj->spi->DL = (value & 0xff);
obj->spi->DH = ((value >> 8) & 0xff);
} else {
obj->spi->DL = value;
}

}