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Improve QSPIFBlockDevice conformance to SFDP #11531

Merged
merged 26 commits into from
Nov 13, 2019

Commits on Nov 12, 2019

  1. Update reading/writing of status registers to conform to SFDP standard

    Matthew Macovsky authored and Kyle Kearney committed Nov 12, 2019
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  2. Reorder some functions

    Matthew Macovsky authored and Kyle Kearney committed Nov 12, 2019
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  3. Update flash device reset to conform to SFDP standard

    Matthew Macovsky authored and Kyle Kearney committed Nov 12, 2019
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  4. Enable 4-byte addressing when supported in accordance with the SFDP s…

    …tandard
    Matthew Macovsky authored and Kyle Kearney committed Nov 12, 2019
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  5. Clear block protection on non-SST flash devices

    Matthew Macovsky authored and Kyle Kearney committed Nov 12, 2019
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  6. Move configuration of QSPI format to within commands where it is nece…

    …ssary
    Matthew Macovsky authored and Kyle Kearney committed Nov 12, 2019
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  7. Update SDFP erase detection to properly handle legacy erase instruction

    Matthew Macovsky authored and Kyle Kearney committed Nov 12, 2019
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  8. Replace power function with bit shift

    Matthew Macovsky authored and Kyle Kearney committed Nov 12, 2019
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  9. Streamline setting of instruction member variables

    Matthew Macovsky authored and Kyle Kearney committed Nov 12, 2019
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  10. Add missing debug prints to command functions

    Matthew Macovsky authored and Kyle Kearney committed Nov 12, 2019
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  11. Correct typos and formatting

    Matthew Macovsky authored and Kyle Kearney committed Nov 12, 2019
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  12. Update QSPI format after enabling 4-byte addressing

    Matthew Macovsky authored and Kyle Kearney committed Nov 12, 2019
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  13. Enable some of the kvstore tests for PSoC 6 MCUs

    Matthew Macovsky authored and Kyle Kearney committed Nov 12, 2019
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  14. Remove redundant QSPI erase alignment

    Matthew Macovsky authored and Kyle Kearney committed Nov 12, 2019
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  15. Generalize KVStore phase 1/2 test BlockDevice sizes

    Matthew Macovsky authored and Kyle Kearney committed Nov 12, 2019
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  16. Enable TDBStore whitebox test on PSoC 6

    Matthew Macovsky authored and Kyle Kearney committed Nov 12, 2019
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  17. Update QSPI test to reflect fixes in QSPIFBlockDevice

    Matthew Macovsky authored and Kyle Kearney committed Nov 12, 2019
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  18. Fix Astyle issues

    Kyle Kearney committed Nov 12, 2019
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  19. Remove hard-coded instruction ids from QSPI Tests

    Replace with macros from the test flash_config header, consistent with
    how most commands are built in this test.
    Kyle Kearney committed Nov 12, 2019
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  20. QSPIF: Add back enable_fast_mode

    This function writes a "config" register to ensure that the flash part
    is in high performance mode, not low-power mode. This is required at
    by at least MX25R6435F in order to operate at frequencies > 33MHz
    (for reference, DISCO_L475VG_IOT01A runs the QSPI interface at 80 MHz).
    The config register that this writes does not appear to be covered by
    the SFDP spec (JESD216D.01) so this remains the status quo of
    unconditional execution, as has been done on master since ARMmbed#8352.
    Kyle Kearney committed Nov 12, 2019
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  21. Don't clear quad enable when clearing block protection

    QSPIFBlockDevice::_clear_block_protection() has logic to retain the
    WIP and WEL bits in status register 1, but it failed to account for
    the situation where the QE bit is also in status register 1.
    In _sfdp_set_quad_enabled, note the status register and bit therein
    for the quad enable, so that _clear_block_protection can retain it.
    Kyle Kearney committed Nov 12, 2019
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  22. QSPIF: Centralize handling of vendor quirks

    Introduce a separate function for handling alterations to device interaction
    which are not covered by the SFDP tables and therefore require checking against
    the vendor id.
    Kyle Kearney committed Nov 12, 2019
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  23. QSPIF: Handle parts with extra config registers

    Default to 2 status registers, but update this value if necessary
     during vendor quirk handling for parts (currently only Macronix)
     which have one status register and two control registers. For the
     purposes of QSPIFBlockDevice, these are all considered status
     (or at least "status-like") registers because they are all written
     via the Write Status Register instruction.
    Set the custom RDCR instruction for Macronix during quirk handling.
    Update reading and writing of status registers to handle a variable
     number of status registers.
    Kyle Kearney committed Nov 12, 2019
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  24. QSPIF: Handle fast mode enable via vendor quirks

    Use a vendor id check to only perform this enable on devices which define the
     second configuration register where the fast mode enable bit lives.
    Change _enable_fast_mode to use the standard status register reading and writing functions
    Kyle Kearney committed Nov 12, 2019
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  25. Disable attempted 4-byte addressing for some boards

    4-byte addressing has been seen to cause failures on NORDIC
    boards and with Macronix memories. Suppress the attempt to enable it
    on that hardware (via vendor quirks and a target check) until either
    the failure cause can be fixed or a more robust suppression mechanism
    is implemented.
    Kyle Kearney committed Nov 12, 2019
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  26. General Block Device Test: Expand Thread Stack

    The addition of trace logging during greentea tests pushes the multithreaded
    read-write test beyond the limits of the stack it allocates for its threads.
    The increase of 128 bytes was chosen by experimentation.
    Kyle Kearney committed Nov 12, 2019
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