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Cypress Asset Update #12422

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merged 4 commits into from
Feb 13, 2020
Merged

Cypress Asset Update #12422

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5bd02f8
Update psoc6pdl to version 1.4.1.2240
dustin-crossman Feb 7, 2020
a8331c2
Update psoc6 core_lib to version 1.1.1.11109.
dustin-crossman Feb 7, 2020
3fdb820
Update psoc6hal to 1.1.1.11145.
dustin-crossman Feb 7, 2020
563edb2
Store RTC century and RTC state information in persistent BREG register.
dustin-crossman Feb 10, 2020
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4 changes: 2 additions & 2 deletions targets/TARGET_Cypress/TARGET_PSOC6/psoc6csp/core_lib/include/cy_result.h
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Expand Up @@ -8,7 +8,7 @@
*
********************************************************************************
* \copyright
* Copyright 2018-2019 Cypress Semiconductor Corporation
* Copyright 2018-2020 Cypress Semiconductor Corporation
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
Expand Down Expand Up @@ -69,7 +69,7 @@ typedef uint32_t cy_rslt_t;

/** \cond INTERNAL */
/** Mask for the bit at position "x" */
#define CY_BIT_MASK(x) ((1U << (x)) - 1U)
#define CY_BIT_MASK(x) ((1UL << (x)) - 1U)

/** Bit position of the result type */
#define CY_RSLT_TYPE_POSITION (16U)
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2 changes: 1 addition & 1 deletion targets/TARGET_Cypress/TARGET_PSOC6/psoc6csp/core_lib/include/cy_utils.h
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Expand Up @@ -6,7 +6,7 @@
*
********************************************************************************
* \copyright
* Copyright 2018-2019 Cypress Semiconductor Corporation
* Copyright 2018-2020 Cypress Semiconductor Corporation
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
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1 change: 1 addition & 0 deletions targets/TARGET_Cypress/TARGET_PSOC6/psoc6csp/core_lib/version.xml
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@@ -0,0 +1 @@
<version>1.1.1.11109</version>
12 changes: 10 additions & 2 deletions targets/TARGET_Cypress/TARGET_PSOC6/psoc6csp/hal/include/cyhal.h
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Expand Up @@ -18,7 +18,7 @@
*
********************************************************************************
* \copyright
* Copyright 2018-2019 Cypress Semiconductor Corporation
* Copyright 2018-2020 Cypress Semiconductor Corporation
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
Expand All @@ -35,7 +35,13 @@
*******************************************************************************/

/**
* \defgroup group_hal HAL Drivers
* \addtogroup group_hal HAL Drivers
* This section documents the drivers which form the stable API of the Cypress HAL.
* In order to remain portable across platforms and HAL versions, applications should
* rely only on functionality documented in this section.
* \{
* \defgroup group_result Result Type
* \}
*/

#pragma once
Expand All @@ -46,10 +52,12 @@
#include "cyhal_adc.h"
#include "cyhal_crc.h"
#include "cyhal_dac.h"
#include "cyhal_dma.h"
#include "cyhal_flash.h"
#include "cyhal_gpio.h"
#include "cyhal_hwmgr.h"
#include "cyhal_i2c.h"
#include "cyhal_ezi2c.h"
#include "cyhal_interconnect.h"
#include "cyhal_lptimer.h"
#include "cyhal_pwm.h"
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32 changes: 15 additions & 17 deletions targets/TARGET_Cypress/TARGET_PSOC6/psoc6csp/hal/include/cyhal_adc.h
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Expand Up @@ -9,7 +9,7 @@
*
********************************************************************************
* \copyright
* Copyright 2018-2019 Cypress Semiconductor Corporation
* Copyright 2018-2020 Cypress Semiconductor Corporation
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
Expand All @@ -29,8 +29,21 @@
* \addtogroup group_hal_adc ADC (Analog to Digital Converter)
* \ingroup group_hal
* \{
* High level interface for interacting with the Cypress ADC.
* High level interface for interacting with the analog to digital converter (ADC).
*
* Each ADC instance supports one or more selectable channels, each
* of which can perform conversions on a different pin.
* See the device datasheet for details about which pins support ADC conversion.
*
* In order to use the ADC, first call cyhal_adc_init to initialize an ADC instance.
* Then call cyhal_adc_channel_init to initialize one or more channels associated with
* that instance.
*
* All channels are single-ended.
* The values returned by the read API are relative to the ADC's voltage range, which
* is device specific.
*
* \defgroup group_hal_adc_common Common
* \defgroup group_hal_adc_functions ADC Functions
* \defgroup group_hal_adc_channel_functions ADC Channel Functions
*/
Expand Down Expand Up @@ -59,12 +72,6 @@ extern "C" {
/** No channels available */
#define CYHAL_ADC_RSLT_NO_CHANNELS (CY_RSLT_CREATE(CY_RSLT_TYPE_ERROR, CYHAL_RSLT_MODULE_ADC, 3))


/**
* \addtogroup group_hal_adc_functions
* \{
*/

/** Initialize ADC peripheral
*
* @param[out] obj The adc object to initialize
Expand All @@ -84,13 +91,6 @@ cy_rslt_t cyhal_adc_init(cyhal_adc_t *obj, cyhal_gpio_t pin, const cyhal_clock_d
*/
void cyhal_adc_free(cyhal_adc_t *obj);

/** \} group_hal_adc_functions */

/**
* \addtogroup group_hal_adc_channel_functions
* \{
*/

/** Initialize a single-ended ADC channel.
*
* Configures the pin used by ADC.
Expand All @@ -116,8 +116,6 @@ void cyhal_adc_channel_free(cyhal_adc_channel_t *obj);
*/
uint16_t cyhal_adc_read_u16(const cyhal_adc_channel_t *obj);

/** \} group_hal_adc_channel_functions */

#if defined(__cplusplus)
}
#endif
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6 changes: 3 additions & 3 deletions targets/TARGET_Cypress/TARGET_PSOC6/psoc6csp/hal/include/cyhal_analog_common.h
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Expand Up @@ -7,7 +7,7 @@
*
********************************************************************************
* \copyright
* Copyright 2018-2019 Cypress Semiconductor Corporation
* Copyright 2018-2020 Cypress Semiconductor Corporation
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
Expand All @@ -29,13 +29,13 @@
extern "C" {
#endif

/**
/**
* Initialize the programmable analog. This utilizes reference counting to avoid
* repeatedly initializing the analog subsystem when multiple analog blocks are in use
* */
void cyhal_analog_init();

/**
/**
* Uninitialize the programmable analog. This utilizes reference counting to avoid
* disabling the analog subsystem until all blocks which require it have been freed.
*/
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13 changes: 10 additions & 3 deletions targets/TARGET_Cypress/TARGET_PSOC6/psoc6csp/hal/include/cyhal_crc.h
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Expand Up @@ -2,14 +2,14 @@
* \file cyhal_crc.h
*
* \brief
* Provides a high level interface for interacting with the Cypress CRC accelerator.
* Provides a high level interface for interacting with the Cypress CRC accelerator.
* This interface abstracts out the chip specific details. If any chip specific
* functionality is necessary, or performance is critical the low level functions
* can be used directly.
*
********************************************************************************
* \copyright
* Copyright 2018-2019 Cypress Semiconductor Corporation
* Copyright 2018-2020 Cypress Semiconductor Corporation
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
Expand All @@ -29,8 +29,15 @@
* \addtogroup group_hal_crc CRC (Cyclic Redundancy Check)
* \ingroup group_hal
* \{
* High level interface for interacting with the Cypress CRC.
* High level interface for interacting with the cyclic redundancy check (CRC), which provides hardware
* accelerated CRC computations.
* The CRC APIs are structured to enable usage in situations where the entire input data
* set is not available in memory at one time. Therefore, each conversion consists of three steps:
* * A single call to cyhal_crc_start, to initialize data structures for this computation
* * One or more calls to cyhal_crc_compute, to provide chunks of data.
* * A single call to cyhal_crc_finish, to finalize the computation and retrieve the result.
*
* Many of the algorithm parameters can be customized; see crc_algorithm_t for more details.
*/

#pragma once
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6 changes: 3 additions & 3 deletions targets/TARGET_Cypress/TARGET_PSOC6/psoc6csp/hal/include/cyhal_crc_impl.h
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@@ -1,13 +1,13 @@
/***************************************************************************//**
/***************************************************************************//**
* \file cyhal_crc_impl.h
*
* Description:
* Provides a high level interface for interacting with the Cypress CRC accelerator.
* Provides a high level interface for interacting with the Cypress CRC accelerator.
* This is a wrapper around the lower level PDL API.
*
********************************************************************************
* \copyright
* Copyright 2018-2019 Cypress Semiconductor Corporation
* Copyright 2018-2020 Cypress Semiconductor Corporation
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
Expand Down
4 changes: 2 additions & 2 deletions targets/TARGET_Cypress/TARGET_PSOC6/psoc6csp/hal/include/cyhal_crypto_common.h
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Expand Up @@ -2,12 +2,12 @@
* \file cyhal_crypto_common.h
*
* Description:
* This file provides common defines, addresses, and functions required by drivers
* This file provides common defines, addresses, and functions required by drivers
* using the Crypto block.
*
********************************************************************************
* \copyright
* Copyright 2018-2019 Cypress Semiconductor Corporation
* Copyright 2018-2020 Cypress Semiconductor Corporation
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
Expand Down
9 changes: 7 additions & 2 deletions targets/TARGET_Cypress/TARGET_PSOC6/psoc6csp/hal/include/cyhal_dac.h
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Expand Up @@ -9,7 +9,7 @@
*
********************************************************************************
* \copyright
* Copyright 2018-2019 Cypress Semiconductor Corporation
* Copyright 2018-2020 Cypress Semiconductor Corporation
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
Expand All @@ -29,8 +29,13 @@
* \addtogroup group_hal_dac DAC (Digital to Analog Converter)
* \ingroup group_hal
* \{
* High level interface for interacting with the Cypress DAC.
* High level interface for interacting with the digital to analog converter (DAC).
*
* This block drives a pin with a firmware configurable voltage. See the device datasheet
* for details on which pins support DAC output.
*
* The cyhal_dac_write and cyhal_dac_read APIs are defined relative to the DAC's output
* voltage range, which is device dependent.
*/

#pragma once
Expand Down
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