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STM32 EMAC : add configuration choice and connection check #12464
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@jeromecoutant, thank you for your changes. |
}, | ||
"eth-phy-reset-delay": { | ||
"help" : "Reset process time - Default value: 0.5s as specified in LAN8742A datasheet", | ||
"value" : "5000" |
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5000 ms is 5 s, not 0.5 s.
@@ -668,14 +713,18 @@ void STM32_EMAC::phy_task() | |||
uint32_t status; | |||
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if (HAL_ETH_ReadPHYRegister(&EthHandle, PHY_BSR, &status) == HAL_OK) { | |||
if (emac_link_state_cb) { | |||
if ((emac_link_state_cb) && (status != 0xFFFF)) { |
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this does not work on my target with LAN8720, still trying to figure out why.
Edit:
fixed, that was a damned wiring error now. Checking against 0xffff works as intended. Wiring error was a fixed level on MDIO pin, and every phy_read returned 0xffff. This is not detected by the interface.
EthHandle.Init.Speed = ETH_SPEED_100M; | ||
EthHandle.Init.DuplexMode = ETH_MODE_FULLDUPLEX; |
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Why not make this configurable too?
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If you think it can be useful, I can add this parameter ?
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Yes, that would be useful for us :)
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Another suggestion: a PHY ID can be read from registers 2 and 3. This could be read out and provided in an API or printed in the debug/trace log. When this ID is invalid, a warning can be issued to find a wrong PHY address easier. |
"eth-phyaddr": { | ||
"thread-stacksize": { | ||
"help": "Stack size for stm32_emac_thread", | ||
"value": 512 |
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how about increasing the value automatically when the trace is enabled? I think for an user it is difficult to guess a valid stacksize when it is configurable.
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During my tests, I didn't see any big difference...
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I think the adjustable stacksize come in from this:
#12416 (comment)
usually its a system thread and should have a fixed threadsize. Are there other cases than this special with trace enabled where stacksize can be a problem?
I don't see any register 2 and 3 in LAN8742a... |
pls check http://ww1.microchip.com/downloads/en/DeviceDoc/DS_LAN8742_00001989A.pdf |
OK, what you call "register 2 and 3" are "PHY Identifier 1 and 2" ? :-)
OK to print in the debug log. Here is what I get:
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Yes! The guys from nxp are also reading the ID: mbed-os/features/netsocket/emac-drivers/TARGET_NXP_EMAC/TARGET_LPCTarget/lpc_phy_dp83848.cpp Lines 107 to 109 in 3662759
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PHY ID debug log added. |
CI started |
Test run: FAILEDSummary: 3 of 4 test jobs failed Failed test jobs:
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baremetal example failed,
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This PR cannot be merged due to conflicts. Please rebase to resolve them. |
- PHY default configuration can be changed - AutoNegotiation - Speed - DuplexMode - PHY register offset can be updated depending on chosen PHY All unused parameters are cleaned.
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OK, I am not used yet to check this. |
CI restarted |
Test run: SUCCESSSummary: 8 of 8 test jobs passed |
@jeromecoutant Is this ready for integration? It looks like to me it is (ready for merge applied). |
Received OK! Merging now |
Summary of changes
Request/question started in https://forums.mbed.com/t/stm32f767-ethernet-with-dp83640/7149
This also fixes #12416
So few corrections are proposed:
Impact of changes
Migration actions required
STM32 EMAC is more configurable for each application.
Default setting have been set for the supported ST boards.
Documentation
Pull request type
Test results
Reviewers