Support of export function to the IAR.

libraries/USBDevice/USBDevice/TARGET_RENESAS/TARGET_RZ_A1H/inc/devdrv_usb_function_api.h

@@ -334,8 +334,8 @@ void     usb1_function_Vendor4(uint16_t type, uint16_t req, uint16_t value, uint
 void     usb1_function_Vendor5(uint16_t type, uint16_t req, uint16_t value, uint16_t index, uint16_t length);
 void     usb1_function_ResetDescriptor(uint16_t mode);
 
-uint16_t Userdef_USB_usb1_function_d0fifo_dmaintid(void);
-uint16_t Userdef_USB_usb1_function_d1fifo_dmaintid(void);
+IRQn_Type Userdef_USB_usb1_function_d0fifo_dmaintid(void);
+IRQn_Type Userdef_USB_usb1_function_d1fifo_dmaintid(void);
 void     Userdef_USB_usb1_function_attach(void);
 void     Userdef_USB_usb1_function_detach(void);
 void     Userdef_USB_usb1_function_delay_1ms(void);

libraries/USBHost/USBHost/USBEndpoint.cpp

@@ -140,7 +140,7 @@ void USBEndpoint::queueTransfer()
 
     //Now add this free TD at this end of the queue
     state = USB_TYPE_PROCESSING;
-    td_current->nextTD = td_next;
+    td_current->nextTD = (hcTd*)td_next;
     hced->tailTD = td_next;
 }
 
@@ -158,5 +158,5 @@ void USBEndpoint::unqueueTransfer(volatile HCTD * td)
 void USBEndpoint::queueEndpoint(USBEndpoint * ed)
 {
     nextEp = ed;
-    hced->nextED = (ed == NULL) ? 0 : ed->getHCED();
+    hced->nextED = (ed == NULL) ? 0 : (hcEd*)(ed->getHCED());
 }

libraries/USBHost/USBHost/USBHost.cpp

@@ -304,7 +304,7 @@ void USBHost::transferCompleted(volatile uint32_t addr)
     do {
         volatile HCTD* td = (volatile HCTD*)addr;
         addr = (uint32_t)td->nextTD; //Dequeue from physical list
-        td->nextTD = tdList; //Enqueue into reversed list
+        td->nextTD = (hcTd*)tdList; //Enqueue into reversed list
         tdList = td;
     } while(addr);
 

libraries/USBHost/USBHost/USBHostTypes.h

@@ -136,10 +136,10 @@ enum ENDPOINT_TYPE {
 #define CONFIGURATION_DESCRIPTOR_LENGTH     0x09
 
 // ------------ HostController Transfer Descriptor ------------
-typedef struct HCTD {
+typedef struct hcTd {
     __IO  uint32_t   control;        // Transfer descriptor control
     __IO  uint8_t *  currBufPtr;    // Physical address of current buffer pointer
-    __IO  HCTD *     nextTD;         // Physical pointer to next Transfer Descriptor
+    __IO  hcTd *     nextTD;         // Physical pointer to next Transfer Descriptor
     __IO  uint8_t *  bufEnd;        // Physical address of end of buffer
     void * ep;                      // ep address where a td is linked in
     uint32_t dummy[3];              // padding

libraries/mbed/targets/cmsis/TARGET_RENESAS/TARGET_RZ_A1H/TOOLCHAIN_IAR/MBRZA1H.icf

@@ -0,0 +1,62 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\a_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x18004000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__   = 0x18000000;
+define symbol __ICFEDIT_region_ROM_end__     = 0x187FFFFF;
+define symbol __ICFEDIT_region_TTB_start__   = 0x20000000;
+define symbol __ICFEDIT_region_TTB_end__     = 0x2001FFFF;
+define symbol __ICFEDIT_region_RAM_start__   = 0x20020000;
+define symbol __ICFEDIT_region_RAM_end__     = 0x209FFFFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__   = 0x00004000;
+define symbol __ICFEDIT_size_svcstack__ = 0x00008000;
+define symbol __ICFEDIT_size_irqstack__ = 0x00008000;
+define symbol __ICFEDIT_size_fiqstack__ = 0x00000100;
+define symbol __ICFEDIT_size_undstack__ = 0x00000100;
+define symbol __ICFEDIT_size_abtstack__ = 0x00000100;
+define symbol __ICFEDIT_size_heap__     = 0x00080000;
+/**** End of ICF editor section. ###ICF###*/
+
+define symbol __ICFEDIT_region_RetRAM_start__       = 0x20000000;
+define symbol __ICFEDIT_region_RetRAM_end__         = 0x2001FFFF;
+
+define symbol __ICFEDIT_region_MirrorRAM_start__    = 0x60900000;
+define symbol __ICFEDIT_region_MirrorRAM_end__      = 0x609FFFFF;
+
+define symbol __ICFEDIT_region_MirrorRetRAM_start__ = 0x60000000;
+define symbol __ICFEDIT_region_MirrorRetRAM_end__   = 0x6001FFFF;
+
+define memory mem with size = 4G;
+
+define region ROM_region          = mem:[from __ICFEDIT_region_ROM_start__          to __ICFEDIT_region_ROM_end__];
+define region RAM_region          = mem:[from __ICFEDIT_region_RAM_start__          to __ICFEDIT_region_RAM_end__];
+define region RetRAM_region       = mem:[from __ICFEDIT_region_RetRAM_start__       to __ICFEDIT_region_RetRAM_end__];
+define region MirrorRAM_region    = mem:[from __ICFEDIT_region_MirrorRAM_start__    to __ICFEDIT_region_MirrorRAM_end__];
+define region MirrorRetRAM_region = mem:[from __ICFEDIT_region_MirrorRetRAM_start__ to __ICFEDIT_region_MirrorRetRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block SVC_STACK with alignment = 8, size = __ICFEDIT_size_svcstack__ { };
+define block IRQ_STACK with alignment = 8, size = __ICFEDIT_size_irqstack__ { };
+define block FIQ_STACK with alignment = 8, size = __ICFEDIT_size_fiqstack__ { };
+define block UND_STACK with alignment = 8, size = __ICFEDIT_size_undstack__ { };
+define block ABT_STACK with alignment = 8, size = __ICFEDIT_size_abtstack__ { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+do not initialize  { section MMU_TT };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region     { readonly };
+place in RAM_region     { readwrite,
+                          block CSTACK, block SVC_STACK, block IRQ_STACK, block FIQ_STACK,
+                          block UND_STACK, block ABT_STACK, block HEAP };
+
+place in RetRAM_region       { section .retram };
+place in MirrorRAM_region    { section .mirrorram };
+place in MirrorRetRAM_region { section .mirrorretram };