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Updated pin mapping and CAN HAL impl for LPC4088 target #23

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Merged
merged 1 commit into from
Aug 8, 2013
Merged

Updated pin mapping and CAN HAL impl for LPC4088 target #23

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27 changes: 15 additions & 12 deletions libraries/USBDevice/USBDevice/USBHAL_LPC40.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -32,8 +32,9 @@
#define PCUSB (1UL<<31)

// USB Clock Control register
#define DEV_CLK_EN (1UL<<1)
#define AHB_CLK_EN (1UL<<4)
#define DEV_CLK_EN (1UL<<1)
#define PORT_CLK_EN (1UL<<3)
#define AHB_CLK_EN (1UL<<4)

// USB Clock Status register
#define DEV_CLK_ON (1UL<<1)
Expand Down Expand Up @@ -364,21 +365,23 @@ USBHAL::USBHAL(void) {
LPC_SC->PCONP |= PCUSB;

// Enable USB clocks
LPC_USB->USBClkCtrl |= DEV_CLK_EN | AHB_CLK_EN;
while ((LPC_USB->USBClkSt & (DEV_CLK_EN | AHB_CLK_EN)) != (DEV_CLK_ON | AHB_CLK_ON));
LPC_USB->USBClkCtrl |= DEV_CLK_EN | AHB_CLK_EN | PORT_CLK_EN;
while ((LPC_USB->USBClkSt & (DEV_CLK_EN | AHB_CLK_EN | PORT_CLK_EN)) != (DEV_CLK_ON | AHB_CLK_ON | PORT_CLK_EN));

// Select port USB2
LPC_USB->StCtrl |= 3;


// Configure pins P0.29 and P0.30 to be USB D+ and USB D-
LPC_IOCON->P0_29 &= ~0x07;
LPC_IOCON->P0_29 |= 0x01;
LPC_IOCON->P0_30 &= ~0x07;
LPC_IOCON->P0_30 |= 0x01;
// Configure pin P0.31 to be USB2
LPC_IOCON->P0_31 &= ~0x07;
LPC_IOCON->P0_31 |= 0x01;

// Disconnect USB device
SIEdisconnect();

// Configure pin P2.9 to be Connect
LPC_IOCON->P2_9 &= ~0x07;
LPC_IOCON->P2_9 |= 0x01;
// Configure pin P0.14 to be Connect
LPC_IOCON->P0_14 &= ~0x07;
LPC_IOCON->P0_14 |= 0x03;

// Connect must be low for at least 2.5uS
wait(0.3);
Expand Down
51 changes: 29 additions & 22 deletions libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC408X/PinNames.h
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Original file line number Diff line number Diff line change
Expand Up @@ -40,38 +40,45 @@ typedef enum {
P5_0, P5_1, P5_2, P5_3, P5_4,

// mbed DIP Pin Names
p5 = P0_9,
p6 = P0_8,
p7 = P0_7,
p8 = P0_6,
p5 = P1_24,
p6 = P1_23,
p7 = P1_20,
p8 = P0_21,
p9 = P0_0,
p10 = P0_1,
p11 = P0_18,
p12 = P0_17,
p13 = P0_15,
p14 = P0_16,
p11 = P0_9,
p12 = P0_8,
p13 = P0_7,
p14 = P0_6,
p15 = P0_23,
p16 = P0_24,
p17 = P0_25,
p18 = P0_26,
p19 = P1_30,
p20 = P1_31,
p21 = P2_5,
p22 = P2_4,
p23 = P2_3,
p24 = P2_2,
p25 = P2_1,
p26 = P2_0,
p27 = P0_11,
p28 = P0_10,
p29 = P0_5,
p30 = P0_4,

p23 = P2_10,
p24 = P1_12,
p25 = P1_11,
p26 = P1_7,
p27 = P1_6,
p28 = P1_5,
p29 = P1_3,
p30 = P1_2,
p31 = P5_3,
p32 = P5_2,
p33 = P0_5,
p34 = P0_4,

p37 = P5_4,
p38 = P5_1,
p39 = P5_0,

// Other mbed Pin Names
LED1 = P2_27,
LED2 = P2_26,
LED3 = P2_26,
LED4 = P2_26,
LED1 = P1_18,
LED2 = P0_13,
LED3 = P1_13,
LED4 = P2_19,

USBTX = P0_2,
USBRX = P0_3,
Expand Down
142 changes: 125 additions & 17 deletions libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC408X/can_api.c
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Original file line number Diff line number Diff line change
Expand Up @@ -13,14 +13,17 @@
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include <math.h>
#include <string.h>

#include "can_api.h"

#include "cmsis.h"
#include "pinmap.h"
#include "error.h"

#include <math.h>
#include <string.h>

#define CAN_NUM 2

/* Acceptance filter mode in AFMR register */
#define ACCF_OFF 0x01
#define ACCF_BYPASS 0x02
Expand Down Expand Up @@ -60,6 +63,9 @@ struct CANMsg {
};
typedef struct CANMsg CANMsg;

static uint32_t can_irq_ids[CAN_NUM] = {0};
static can_irq_handler irq_handler;

static uint32_t can_disable(can_t *obj) {
uint32_t sm = obj->dev->MOD;
obj->dev->MOD |= 1;
Expand All @@ -72,6 +78,101 @@ static inline void can_enable(can_t *obj) {
}
}

int can_mode(can_t *obj, CanMode mode)
{
return 0; // not implemented
}

static inline void can_irq(uint32_t icr, uint32_t index) {
uint32_t i;

for(i = 0; i < 8; i++)
{
if((can_irq_ids[index] != 0) && (icr & (1 << i)))
{
switch (i) {
case 0: irq_handler(can_irq_ids[index], IRQ_RX); break;
case 1: irq_handler(can_irq_ids[index], IRQ_TX); break;
case 2: irq_handler(can_irq_ids[index], IRQ_ERROR); break;
case 3: irq_handler(can_irq_ids[index], IRQ_OVERRUN); break;
case 4: irq_handler(can_irq_ids[index], IRQ_WAKEUP); break;
case 5: irq_handler(can_irq_ids[index], IRQ_PASSIVE); break;
case 6: irq_handler(can_irq_ids[index], IRQ_ARB); break;
case 7: irq_handler(can_irq_ids[index], IRQ_BUS); break;
case 8: irq_handler(can_irq_ids[index], IRQ_READY); break;
}
}
}
}

// Have to check that the CAN block is active before reading the Interrupt
// Control Register, or the mbed hangs
void can_irq_n() {
uint32_t icr;

if(LPC_SC->PCONP & (1 << 13)) {
icr = LPC_CAN1->ICR & 0x1FF;
can_irq(icr, 0);
}

if(LPC_SC->PCONP & (1 << 14)) {
icr = LPC_CAN2->ICR & 0x1FF;
can_irq(icr, 1);
}
}

// Register CAN object's irq handler
void can_irq_init(can_t *obj, can_irq_handler handler, uint32_t id) {
irq_handler = handler;
can_irq_ids[obj->index] = id;
}

// Unregister CAN object's irq handler
void can_irq_free(can_t *obj) {
obj->dev->IER &= ~(1);
can_irq_ids[obj->index] = 0;

if ((can_irq_ids[0] == 0) && (can_irq_ids[1] == 0)) {
NVIC_DisableIRQ(CAN_IRQn);
}
}

// Clear or set a irq
void can_irq_set(can_t *obj, CanIrqType type, uint32_t enable) {
uint32_t ier;

switch (type) {
case IRQ_RX: ier = (1 << 0); break;
case IRQ_TX: ier = (1 << 1); break;
case IRQ_ERROR: ier = (1 << 2); break;
case IRQ_OVERRUN: ier = (1 << 3); break;
case IRQ_WAKEUP: ier = (1 << 4); break;
case IRQ_PASSIVE: ier = (1 << 5); break;
case IRQ_ARB: ier = (1 << 6); break;
case IRQ_BUS: ier = (1 << 7); break;
case IRQ_READY: ier = (1 << 8); break;
default: return;
}

obj->dev->MOD |= 1;
if(enable == 0) {
obj->dev->IER &= ~ier;
}
else {
obj->dev->IER |= ier;
}
obj->dev->MOD &= ~(1);

// Enable NVIC if at least 1 interrupt is active
if(LPC_CAN1->IER | LPC_CAN2->IER != 0) {
NVIC_SetVector(CAN_IRQn, (uint32_t) &can_irq_n);
NVIC_EnableIRQ(CAN_IRQn);
}
else {
NVIC_DisableIRQ(CAN_IRQn);
}
}

// This table has the sampling points as close to 75% as possible. The first
// value is TSEG1, the second TSEG2.
static const int timing_pts[23][2] = {
Expand Down Expand Up @@ -132,6 +233,7 @@ static unsigned int can_speed(unsigned int sclk, unsigned int pclk, unsigned int
}

return btr;

}

void can_init(can_t *obj, PinName rd, PinName td) {
Expand All @@ -141,19 +243,24 @@ void can_init(can_t *obj, PinName rd, PinName td) {
if ((int)obj->dev == NC) {
error("CAN pin mapping failed");
}

switch ((int)obj->dev) {
case CAN_1: LPC_SC->PCONP |= 1 << 13; break;
case CAN_2: LPC_SC->PCONP |= 1 << 14; break;
}

pinmap_pinout(rd, PinMap_CAN_RD);
pinmap_pinout(td, PinMap_CAN_TD);

switch ((int)obj->dev) {
case CAN_1: obj->index = 0; break;
case CAN_2: obj->index = 1; break;
}

can_reset(obj);
obj->dev->IER = 0; // Disable Interrupts
can_frequency(obj, 100000);

LPC_CANAF->AFMR = ACCF_BYPASS; // Bypass Filter
}

Expand All @@ -166,8 +273,9 @@ void can_free(can_t *obj) {

int can_frequency(can_t *obj, int f) {
int pclk = PeripheralClock;
int btr = can_speed(SystemCoreClock, pclk, (unsigned int)f, 1);

int btr = can_speed(SystemCoreClock, pclk, (unsigned int)f, 1);

if (btr > 0) {
uint32_t modmask = can_disable(obj);
obj->dev->BTR = btr;
Expand All @@ -181,16 +289,16 @@ int can_frequency(can_t *obj, int f) {
int can_write(can_t *obj, CAN_Message msg, int cc) {
unsigned int CANStatus;
CANMsg m;

can_enable(obj);

m.id = msg.id ;
m.dlc = msg.len & 0xF;
m.rtr = msg.type;
m.type = msg.format;
memcpy(m.data, msg.data, msg.len);
const unsigned int *buf = (const unsigned int *)&m;

CANStatus = obj->dev->SR;
if (CANStatus & 0x00000004) {
obj->dev->TFI1 = buf[0] & 0xC00F0000;
Expand All @@ -203,7 +311,7 @@ int can_write(can_t *obj, CAN_Message msg, int cc) {
obj->dev->CMR = 0x21;
}
return 1;

} else if (CANStatus & 0x00000400) {
obj->dev->TFI2 = buf[0] & 0xC00F0000;
obj->dev->TID2 = buf[1];
Expand All @@ -215,7 +323,7 @@ int can_write(can_t *obj, CAN_Message msg, int cc) {
obj->dev->CMR = 0x41;
}
return 1;

} else if (CANStatus & 0x00040000) {
obj->dev->TFI3 = buf[0] & 0xC00F0000;
obj->dev->TID3 = buf[1];
Expand All @@ -228,31 +336,31 @@ int can_write(can_t *obj, CAN_Message msg, int cc) {
}
return 1;
}

return 0;
}

int can_read(can_t *obj, CAN_Message *msg) {
CANMsg x;
unsigned int *i = (unsigned int *)&x;

can_enable(obj);

if (obj->dev->GSR & 0x1) {
*i++ = obj->dev->RFS; // Frame
*i++ = obj->dev->RID; // ID
*i++ = obj->dev->RDA; // Data A
*i++ = obj->dev->RDB; // Data B
obj->dev->CMR = 0x04; // release receive buffer

msg->id = x.id;
msg->len = x.dlc;
msg->format = (x.type)? CANExtended : CANStandard;
msg->type = (x.rtr)? CANRemote: CANData;
memcpy(msg->data,x.data,x.dlc);
return 1;
}

return 0;
}

Expand Down
4 changes: 2 additions & 2 deletions libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC408X/device.h
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Expand Up @@ -41,8 +41,8 @@

#define DEVICE_PWMOUT 1

#define DEVICE_SEMIHOST 0 // Need HW?
#define DEVICE_LOCALFILESYSTEM 0 // Need HW?
#define DEVICE_SEMIHOST 0
#define DEVICE_LOCALFILESYSTEM 0
#define DEVICE_ID_LENGTH 32
#define DEVICE_MAC_OFFSET 20

Expand Down
1 change: 1 addition & 0 deletions libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC408X/objects.h
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Expand Up @@ -60,6 +60,7 @@ struct dac_s {

struct can_s {
LPC_CAN_TypeDef *dev;
int index;
};

struct i2c_s {
Expand Down
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