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Merged
merged 6 commits into from
Oct 25, 2016
Merged

InterruptIn changes in NCS36510 HAL. #2938

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20e6a05
Serial printf and InterruptIn changes
radhika-raghavendran Oct 13, 2016
b026524
Fixed automerge problems.
radhika-raghavendran Oct 14, 2016
a3bccfd
gpio is connected API
radhika-raghavendran Oct 17, 2016
17ed9e9
Reverting Clock GPIO code to previous implementation of the gpio_api.…
radhika-raghavendran Oct 19, 2016
1573405
IRQ enable code moved out.
radhika-raghavendran Oct 19, 2016
7598b05
Enable not checking against 0 or 1.
radhika-raghavendran Oct 19, 2016
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1 change: 1 addition & 0 deletions targets/TARGET_ONSEMI/TARGET_NCS36510/clock.h
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Original file line number Diff line number Diff line change
Expand Up @@ -82,6 +82,7 @@

#define CLOCK_ENABLE(a) CLOCKREG->PDIS.WORD &= ~(1 << a)
#define CLOCK_DISABLE(a) CLOCKREG->PDIS.WORD |= (uint32_t)(1 << a)
#define CLOCK_IS_ENABLED(a) (((CLOCKREG->PDIS.WORD >> a) & 1)?0:1)

/*************************************************************************************************
* *
Expand Down
30 changes: 17 additions & 13 deletions targets/TARGET_ONSEMI/TARGET_NCS36510/gpio_api.c
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Expand Up @@ -109,9 +109,6 @@ void gpio_init(gpio_t *obj, PinName pin)
/** - Get PAD IO register address for the PAD number */
PadReg_t *PadRegOffset = (PadReg_t*)(PADREG_BASE + (pin * PAD_REG_ADRS_BYTE_SIZE));

/* - Disable the GPIO clock */
CLOCK_DISABLE(CLOCK_GPIO);

/** - Enable the clock for PAD peripheral device */
CLOCK_ENABLE(CLOCK_PAD);

Expand Down Expand Up @@ -142,7 +139,7 @@ void gpio_mode(gpio_t *obj, PinMode mode)
*/
void gpio_dir(gpio_t *obj, PinDirection direction)
{
/* Enable the GPIO clock */
/* Enable the GPIO clock which may have been switched off by other drivers */
CLOCK_ENABLE(CLOCK_GPIO);

if (direction == PIN_INPUT) {
Expand All @@ -151,8 +148,6 @@ void gpio_dir(gpio_t *obj, PinDirection direction)
obj->GPIOMEMBASE->W_OUT = obj->gpioMask;
}

/* - Disable the GPIO clock */
CLOCK_DISABLE(CLOCK_GPIO);
}

/** Set the output value
Expand All @@ -162,7 +157,8 @@ void gpio_dir(gpio_t *obj, PinDirection direction)
*/
void gpio_write(gpio_t *obj, int value)
{
/* Enable the GPIO clock */

/* Enable the GPIO clock which may have been switched off by other drivers */
CLOCK_ENABLE(CLOCK_GPIO);

/* Set the GPIO based on value */
Expand All @@ -172,8 +168,6 @@ void gpio_write(gpio_t *obj, int value)
obj->GPIOMEMBASE->R_IRQ_W_CLEAR = obj->gpioMask;
}

/* - Disable the GPIO clock */
CLOCK_DISABLE(CLOCK_GPIO);
}

/** Read the input value
Expand All @@ -185,13 +179,23 @@ int gpio_read(gpio_t *obj)
{
int ret;

/* Enable the GPIO clock */
/* Enable the GPIO clock which may have been switched off by other drivers */
CLOCK_ENABLE(CLOCK_GPIO);

ret = (obj->GPIOMEMBASE->R_STATE_W_SET & obj->gpioMask) ? 1: 0;

/* - Disable the GPIO clock */
CLOCK_DISABLE(CLOCK_GPIO);

return ret;
}

/* Checks if gpio object is connected (pin was not initialized with NC)
* @param pin The pin to be set as GPIO
* @return 0 if port is initialized with NC
**/
int gpio_is_connected(const gpio_t *obj)
{
if(obj->gpioPin != (PinName)NC) {
return 1;
} else {
return 0;
}
}
82 changes: 34 additions & 48 deletions targets/TARGET_ONSEMI/TARGET_NCS36510/gpio_irq_api.c
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Expand Up @@ -79,17 +79,17 @@ static uint32_t gpioIds[NUMBER_OF_GPIO] = {0};

/** Main GPIO IRQ handler called from vector table handler
*
* @param gpioBase The GPIO register base address
* @return void
* @param gpioBase The GPIO register base address
* @return void
*/
void fGpioHandler(void)
{
uint8_t index;
uint32_t active_interrupts = 0;
gpio_irq_event event;
gpio_irq_event event = IRQ_NONE;
GpioReg_pt gpioBase;

/* Enable the GPIO clock */
/* Enable the GPIO clock which may have been switched off by other drivers */
CLOCK_ENABLE(CLOCK_GPIO);

gpioBase = GPIOREG;
Expand All @@ -106,15 +106,12 @@ void fGpioHandler(void)
if ((gpioBase->IRQ_POLARITY_SET >> index) &0x01) {
/* Edge triggered high */
event = IRQ_RISE;
} else if ((gpioBase->IRQ_POLARITY_CLEAR >> index) &0x01) {
} else {
/* Edge triggered low */
event = IRQ_FALL;
} else {
/* Edge none */
event = IRQ_NONE;
}
}
gpioBase->IRQ_CLEAR |= (0x1 << index);
gpioBase->IRQ_CLEAR = (0x1 << index);

/* Call the handler registered to the pin */
irq_handler(gpioIds[index], event);
Expand Down Expand Up @@ -145,22 +142,16 @@ int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32
/* Store the ID, this is required by registered handler function */
gpioIds[pin] = id;

/* Enable the GPIO clock */
/* Enable the GPIO clock which may have been switched off by other drivers */
CLOCK_ENABLE(CLOCK_GPIO);

/* Initialize the GPIO membase */
obj->GPIOMEMBASE = GPIOREG;

/* Set default values for the pin interrupt */
/* TODO: Only one DIO line is configured using this function; overrides other DIO line setting
* If mbed layer wants to call this function repeatedly for setting multiple DIO lines as input
* then change this setting to obj->GPIOMEMBASE->W_IN |= obj->pinMask. All parameter setting needs to change from = to |=
*/
obj->GPIOMEMBASE->W_IN = obj->pinMask;
obj->GPIOMEMBASE->IRQ_ENABLE_SET = obj->pinMask;
obj->GPIOMEMBASE->IRQ_EDGE = obj->pinMask;
obj->GPIOMEMBASE->IRQ_POLARITY_SET = (obj->pinMask);
obj->GPIOMEMBASE->ANYEDGE_SET = IO_NONE;
obj->GPIOMEMBASE->IRQ_POLARITY_SET = obj->pinMask;

/* Register the handler for this pin */
irq_handler = handler;
Expand All @@ -178,10 +169,11 @@ int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32
*/
void gpio_irq_free(gpio_irq_t *obj)
{
/* Enable the GPIO clock */
/* Enable the GPIO clock which may have been switched off by other drivers */
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Really you need to ensure no other driver does turn it off - assuming the clock needs to stay running for the interrupts to work, not just for the register access? (If the clock only needed to be on for the register access, you could disable it at the end of the function).

CLOCK_ENABLE(CLOCK_GPIO);

obj->GPIOMEMBASE->W_IN = (IO_ALL ^ (obj->pinMask));
/* Disable IRQs to indicate that it is now free */
obj->GPIOMEMBASE->IRQ_ENABLE_CLEAR = obj->pinMask;
gpioIds[obj->pin] = 0;
}

Expand All @@ -193,42 +185,35 @@ void gpio_irq_free(gpio_irq_t *obj)
*/
void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable)
{

/* Enable the GPIO clock */
/* Enable the GPIO clock which may have been switched off by other drivers */
CLOCK_ENABLE(CLOCK_GPIO);

obj->GPIOMEMBASE->IRQ_EDGE = obj->pinMask;

switch(event) {
case IRQ_RISE:
obj->GPIOMEMBASE->IRQ_EDGE = (obj->pinMask);
obj->GPIOMEMBASE->IRQ_LEVEL = (IO_ALL ^ (obj->pinMask));
/* Enable is an integer; hence checking for 1 or 0*/
if (enable == 1) {
/* Enable rising edge */
obj->GPIOMEMBASE->IRQ_POLARITY_SET = (obj->pinMask);
} else if (enable == 0) {
/* Disable rising edge */
obj->GPIOMEMBASE->IRQ_POLARITY_SET = (IO_ALL ^ (obj->pinMask));
}
break;
case IRQ_RISE:

/* Enable rising edge */
obj->GPIOMEMBASE->IRQ_POLARITY_SET = obj->pinMask;
break;

case IRQ_FALL:
obj->GPIOMEMBASE->IRQ_EDGE = (obj->pinMask);
obj->GPIOMEMBASE->IRQ_LEVEL = (IO_ALL ^ (obj->pinMask));
/* Enable is an integer; hence checking for 1 or 0*/
if (enable == 1) {
/* Enable falling edge */
obj->GPIOMEMBASE->IRQ_POLARITY_CLEAR = (obj->pinMask);
} else if (enable == 0) {
/* Disable falling edge */
obj->GPIOMEMBASE->IRQ_POLARITY_CLEAR = (IO_ALL ^ (obj->pinMask));
}

/* Enable falling edge */
obj->GPIOMEMBASE->IRQ_POLARITY_CLEAR = obj->pinMask;
break;

default:
/* No event is set */
break;
}
/* Enable the IRQ based on enable parameter */
if (enable) {

obj->GPIOMEMBASE->IRQ_ENABLE_SET = obj->pinMask;
} else {

obj->GPIOMEMBASE->IRQ_ENABLE_CLEAR = obj->pinMask;
}
}

/** Enable GPIO IRQ
Expand All @@ -238,10 +223,10 @@ void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable)
*/
void gpio_irq_enable(gpio_irq_t *obj)
{
/* Enable the GPIO clock */
/* Enable the GPIO clock which may have been switched off by other drivers */
CLOCK_ENABLE(CLOCK_GPIO);

obj->GPIOMEMBASE->IRQ_ENABLE_SET = (obj->pinMask);
obj->GPIOMEMBASE->IRQ_ENABLE_SET = obj->pinMask;
}

/** Disable GPIO IRQ
Expand All @@ -251,10 +236,11 @@ void gpio_irq_enable(gpio_irq_t *obj)
*/
void gpio_irq_disable(gpio_irq_t *obj)
{
/* Enable the GPIO clock */

/* Enable the GPIO clock which may have been switched off by other drivers */
CLOCK_ENABLE(CLOCK_GPIO);

obj->GPIOMEMBASE->IRQ_ENABLE_CLEAR = (obj->pinMask);
obj->GPIOMEMBASE->IRQ_ENABLE_CLEAR = obj->pinMask;
}

#endif //DEVICE_INTERRUPTIN
16 changes: 12 additions & 4 deletions targets/TARGET_ONSEMI/TARGET_NCS36510/ncs36510Init.c
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Expand Up @@ -83,6 +83,13 @@ boolean fTrim()
RFANATRIMREG->TX_VCO_TRIM_LUT1 = TRIMREG->TX_VCO_LUT1.WORD;;
RFANATRIMREG->TX_VCO_TRIM_LUT2 = TRIMREG->TX_VCO_LUT2.WORD;;

if ( TRIMREG->MAC_ADDR_LOW != 0xFFFFFFFF ) {
MACHWREG->LONG_ADDRESS_LOW = TRIMREG->MAC_ADDR_LOW;
}

if ( TRIMREG->MAC_ADDR_HIGH != 0xFFFFFFFF ) {
MACHWREG->LONG_ADDRESS_HIGH = TRIMREG->MAC_ADDR_HIGH;
}

return True;
} else {
Expand Down Expand Up @@ -158,15 +165,16 @@ void fPmuInit()
SCB->SCR &= ~SCB_SCR_SLEEPONEXIT_Msk;

/** Set regulator timings */
PMUREG->FVDD_TSETTLE = 160;
PMUREG->FVDD_TSTARTUP = 400;
PMUREG->FVDD_TSETTLE = 160;
PMUREG->FVDD_TSTARTUP = 400;


/** Keep SRAMA & SRAMB powered in coma mode */
PMUREG->CONTROL.BITS.SRAMA = False;
PMUREG->CONTROL.BITS.SRAMB = False;

PMUREG->CONTROL.BITS.N1V1 = True; /* Enable ACTIVE mode switching regulator */
PMUREG->CONTROL.BITS.C1V1 = True; /* Enable COMA mode switching regulator */
PMUREG->CONTROL.BITS.N1V1 = True; /* Enable ACTIVE mode switching regulator */
PMUREG->CONTROL.BITS.C1V1 = True; /* Enable COMA mode switching regulator */

/** Disable the clock for PMU peripheral device, all settings are done */
CLOCK_DISABLE(CLOCK_PMU);
Expand Down
1 change: 0 additions & 1 deletion targets/TARGET_ONSEMI/TARGET_NCS36510/pinmap.c
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Expand Up @@ -75,7 +75,6 @@ void pin_mode(PinName pin, PinMode mode)

default:
break;

}

/** - Disable the clock for PAD peripheral device */
Expand Down
4 changes: 2 additions & 2 deletions targets/TARGET_ONSEMI/TARGET_NCS36510/serial_api.c
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Expand Up @@ -132,8 +132,8 @@ void serial_init(serial_t *obj, PinName tx, PinName rx)
PadRegOffset = (PadReg_t*)(PADREG_BASE + (rx * PAD_REG_ADRS_BYTE_SIZE));
PadRegOffset->PADIO0.WORD = PAD_UART_RX; /* Pad settings for UART Rx */

GPIOREG->W_OUT |= (True << tx); /* tx as OUT direction */
GPIOREG->W_IN |= (True << rx); /* rx as IN directon */
GPIOREG->W_OUT = (0x1 << tx); /* tx as OUT direction */
GPIOREG->W_IN = (0x1 << rx); /* rx as IN directon */

CLOCK_DISABLE(CLOCK_PAD);
CLOCK_DISABLE(CLOCK_CROSSB);
Expand Down
8 changes: 4 additions & 4 deletions targets/TARGET_ONSEMI/TARGET_NCS36510/trim_map.h
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Expand Up @@ -50,10 +50,10 @@
**************************************************************************************************/

/** trim register map */
typedef struct { /**< REV B REV D */
__I uint32_t PAD0; /**< 0x1FA0 0x1FA0 */
__I uint32_t APP_RESERVED0; /**< 0x1FA4 0x1FA4 */
__I uint32_t APP_RESERVED1; /**< 0x1FA8 0x1FA8 */
typedef struct { /**< REV B REV D */
__I uint32_t PAD0; /**< 0x1FA0 0x1FA0 */
__I uint32_t MAC_ADDR_LOW; /**< 0x1FA4 */
__I uint32_t MAC_ADDR_HIGH; /**< 0x1FA8 */
#ifdef REVB
__I uint32_t TX_POWER; /**< 0x1FAC */
#endif
Expand Down