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Release candidate for mbed-os-5.2-rc3 #3033
Commits on Oct 14, 2016
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Remove sal-stack-lwip.a from IAR linker configuration file
Locate *lwip_* in XRAM to fix IRAM OOM
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1. Fix clone SHA context error. Convert SHA H/W context to SHA S/W context due to just one instance of SHA H/W. 2. Fix partial update error.
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Fix us_ticker/lp_ticker alarm error
Error occurs as newly scheduled alarm is behind now due to signed/unsigned comparison pitfall: -1 < 1u ==> 0 or 1
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Remove fix of lp_ticker wrap-around
The original fix cannot handle both wrap-around and scheduled alarm behind now well. Leave wrap-around as known issue.
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Disable GPIO IRQ debounce by default
Some application requires GPIO IRQ to be low latency. To complement it, open up GPIO IRQ debounce configuration through mbed_lib.json.
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Fix pin definition error regarding SD, I2C, and SPI
1. Fix pin definition error regarding SD. 2. Fix pin definition error regarding I2C. 3. Fix pin definition error regarding SPI. 4. Add pinmap for SD.
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Move files to match ARM mbed's restructure
1. Move USBHALHost_M451.cpp and USBHALHost_NUC472.cpp. 2. Move TARGET_M451/mbed_lib.json. 3. Move TARGET_NUC472/crypto. 4. Move TARGET_NUC472/mbed_lib.json.
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Move files to match ARM mbed's restructure
1. Move M451Series.h to device. 2. Move StdDriver to device. 3. Move TOOLCHAIN_* to device. 4. Move cmsis*, startup_M451Series.c, and system_M451Series.c/h to device.
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EFM32: Make NVIC functions virtualizable
With CMSIS 5, the NVIC functions are virtualizable. Rename the EFM32 NVIC functions to support being virtualized.
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EFM32: Use SECURE_ACCESS to access the ROM table
To allow enabling of uVisor on EFM32, the ROM table must be accessed through the CMSIS-provided SECURE_ACCESS macro.
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I2C bugfix 'i2c_stop()' timeout
- Remove waiting for 'BTF' flag in 'i2c_stop()': When 'i2c_stop()' is called from 'i2c_read()' or 'i2c_write()' flag 'BTF' has already been cleared (indirectly) by the calling functions and therefore 'i2c_stop()' would mistakenly always run into a timeout. - Delay clock enabling until pins are configured: Enabling the I2C bus clock before configuring its pins might in rare cases lead to HW faults on the bus. - Move initialization of 'handle->Instance' to function 'i2c_reset()': As 'i2c_reset()' uses '__HAL_I2C_GET_FLAG(handle, I2C_FLAG_BUSY)' field 'handle->Instance' must have been initialized before doing so. Therefore, this operation has been anticipated by moving it from function 'i2c_frequency()' to function 'i2c_reset()'.
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Accept profile name as well as file path for tools/make.py --profile
--profile can be used with just a profile name eg. default, debug as long as <name>.json file is in default profile directory.
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Revert "Allow max-depth specification in memap"
This reverts commit 8f9f4ee since it broke memory map info for IAR, ARMCC and on windows, GCC_ARM.
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Add support for KL82Z FRDM board
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
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Update tests to add support for FRDM KL43Z and FRDM KL82Z
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
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Deploy SPI_ASYNCH to all family
the SPI_ASYNCH feature has been already activated for STM32F4. This patchset makes it supported on all STM32 families by: - moving spi_s structure at family level instead of board level - using the F4 spi_api.c reference implementation and making it a common stm_spi_api.c file which makes maintenance a lot easier. - the only part that needs to be implemented for each family is the computation of the clock frequency input to the spi peripheral which is not the same accross families. So this is what remains in the spi_api.c of each family. Because of the introduction of the common file, all the above modifications needs to be done at once.
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spi_master_write - rely on HAL
ASYNCH SPI transfer support has been added based on STM HAL services. To have both ASYNCH and SYNCH work together, we're also moving the write API to STM HAL instead of direct registers access.
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Enable SPI_ASYNCH on STM32 boards
Now that SPI_ASYNCH is supported on all STM32 based boards, let's activate the feature. Using a default SPI QUEUE of size 2 - this can be later modified if this prives to be to low. (or too high)
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SPI Peripheral pin - allow SPI3 to be used
Let's swap default PA_4 pin mapping to SPI_3 otherwise SPI3 cannot be used
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Fix indentation issues, remove useless comments, correct if/else format
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STM32F303ZE was introduced in parallel to the changes which consist in having family wide definitions like device.h file and a common objects definition. This target is updated accordingly now to benefit of SPI definitions.
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Don't ask multiple DNS servers in case of successful connection, even if the response is negative. Make sure the return value is correct.
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Properly set flags for default_lib = small
Use newlib nano for targets which have the key "default_lib" set to "small". Also support the legacy key of "default_build".
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lwip-interface: fix issue #2993
DEVICE_ are passed as command line -D, thus no inclusion is required. ``platform.h`` is C++ header file, should not be pulled in C files
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Currently only one network interface can be compiled in at a given time, to avoid failing automated test on this target WiFi will be disabled by default.
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squash TARGET_NRF5: corrections
Squash all the changes in the PR 2865 - "TARGET_NRF5: A few corrections in HAL implementation." This PR causes problems with the release script so a squashed version without merges is needed.
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Commits on Oct 15, 2016
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Merge pull request #3032 from ARMmbed/squash_pr2865
Manually bring PR 2865 into the release
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