[LPC15xx] Ensure that PWM=1 is resolved correctly #3503
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Apr 30, 2024
Ports for Upcoming Targets Fixes and Changes 3488: Dev stm i2c v2 unitary functions ARMmbed/mbed-os#3488 3492: Fix #3463 CAN read() return value ARMmbed/mbed-os#3492 3503: [LPC15xx] Ensure that PWM=1 is resolved correctly ARMmbed/mbed-os#3503 3504: [LPC15xx] CAN implementation improvements ARMmbed/mbed-os#3504 3539: NUCLEO_F412ZG - Add support of TRNG peripheral ARMmbed/mbed-os#3539 3540: STM: SPI: Initialize Rx in spi_master_write ARMmbed/mbed-os#3540 3438: K64F: Add support for SERIAL ASYNCH API ARMmbed/mbed-os#3438 3519: MCUXpresso: Fix ENET driver to enable interrupts after interrupt handler is set ARMmbed/mbed-os#3519 3544: STM32L4 deepsleep improvement ARMmbed/mbed-os#3544 3546: NUCLEO-F412ZG - Add CAN peripheral ARMmbed/mbed-os#3546 3551: Fix I2C driver for RZ/A1H ARMmbed/mbed-os#3551 3558: K64F UART Asynch API: Fix synchronization issue ARMmbed/mbed-os#3558 3563: LPC4088 - Fix vector checksum ARMmbed/mbed-os#3563 3567: Dev stm32 F0 v1.7.0 ARMmbed/mbed-os#3567 3577: Fixes linking errors when building with debug profile ARMmbed/mbed-os#3577
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Currently, when there's a conflict on timer events (like PWM low compare and period reset), it defaults to "do nothing" (keep previous output value). When the PWM duty cycle is changed directly from 0 to 1, the only events are conflict events (because both match values are equal) and the PWM gets stuck low. This changes the conflict resolution rules for set to take priority.
(this conflict case only comes up when PWM duty cycle is 1, in the 0 case there was already special case code to force the output low and stop the timer)