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feat: add support for wireless fpga-based manchester daq #14

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merged 24 commits into from
Apr 9, 2024
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49d928f
import script from wireless repo: https://github.com/phildong/wireles…
phildong Oct 23, 2023
64f8cda
Add bitstring dependencies and add uart_daq to docs
sneakers-the-rat Oct 23, 2023
f912c42
Adding OpalKelly vendor module
sneakers-the-rat Oct 25, 2023
c5b3a44
move os specific files to separate folders
phildong Oct 29, 2023
982fe41
add link to lib
phildong Oct 29, 2023
209b560
Add multiplatform opalkelly SDK files, got mac working, committing so…
sneakers-the-rat Oct 30, 2023
804d1bd
linux relative library loading
Oct 30, 2023
2de3730
Add docs
sneakers-the-rat Oct 30, 2023
111109b
Add installation instructions to docs, add correct notimplemented err…
sneakers-the-rat Oct 30, 2023
ed85bf4
Add opalkelly docs and vendor docs pages
sneakers-the-rat Oct 30, 2023
e362b2c
Remove bitfile from uart daq args
sneakers-the-rat Oct 31, 2023
60ecb3d
Remove mutable arguments from signatures
sneakers-the-rat Oct 31, 2023
d909710
revive broken uart functions / make input device selectable with args
t-sasatani Nov 1, 2023
b13fcea
Rewrite uart_capture function based on BitArray
t-sasatani Nov 1, 2023
5acf0c3
changed file/function/script names from uart->stream to represent fun…
t-sasatani Nov 1, 2023
a91de46
Change variable names
t-sasatani Nov 1, 2023
dcb88a3
put native bytes into queue instead of bitstring objects
phildong Nov 2, 2023
d168e69
[bugfix] bit ordering in wireless daq causing vertical banding
sneakers-the-rat Nov 8, 2023
25c92a9
Merge pull request #17 from Aharoni-Lab/hotfix-wireless-byte-ordering
sneakers-the-rat Nov 8, 2023
d430dc7
add type hint
phildong Nov 17, 2023
0176dc0
clean up unused variables
phildong Nov 17, 2023
95d75bb
add documentation to fpga-related functions
phildong Dec 20, 2023
088c448
make daq run - remove type annotations, declare variables earlier
MarcelMB Apr 8, 2024
d8b49f9
added 8MHz FPGA bit file
MarcelMB Apr 9, 2024
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40 changes: 24 additions & 16 deletions miniscope_io/stream_daq.py
Original file line number Diff line number Diff line change
Expand Up @@ -15,6 +15,15 @@
from bitstring import Array, BitArray, Bits
from pydantic import BaseModel

HAVE_OK = False
ok_error = None
try:
from miniscope_io.devices.opalkelly import okDev

HAVE_OK = True
except (ImportError, ModuleNotFoundError) as ok_error:
pass

# Parsers for daq inputs
daqParser = argparse.ArgumentParser("stream_image_capture")
daqParser.add_argument("source", help='Input source; ["UART", "OK"]')
Expand Down Expand Up @@ -243,7 +252,7 @@ def _uart_recv(

def _fpga_recv(
self,
serial_buffer_queue: multiprocessing.Queue[bytes],
serial_buffer_queue: multiprocessing.Queue,
read_length: int = None,
pre_first: bool = True,
) -> None:
Expand Down Expand Up @@ -319,8 +328,8 @@ def _fpga_recv(

def _buffer_to_frame(
self,
serial_buffer_queue: multiprocessing.Queue[bytes],
frame_buffer_queue: multiprocessing.Queue[list[bytes]],
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multiple instances removed [bytes]

serial_buffer_queue: multiprocessing.Queue,
frame_buffer_queue: multiprocessing.Queue,
):
"""
Group buffers together to make frames.
Expand Down Expand Up @@ -357,6 +366,8 @@ def _buffer_to_frame(
cur_fm_buffer_index = -1 # Index of buffer within frame
cur_fm_num = -1 # Frame number

frame_buffer = [None] * self.nbuffer_per_fm

while 1:
if (
serial_buffer_queue.qsize() > 0
Expand Down Expand Up @@ -412,8 +423,8 @@ def _buffer_to_frame(

def _format_frame(
self,
frame_buffer_queue: multiprocessing.Queue[list[bytes]],
imagearray: multiprocessing.Queue[np.ndarray],
frame_buffer_queue: multiprocessing.Queue,
imagearray: multiprocessing.Queue,
):
"""
Construct frame from grouped buffers.
Expand Down Expand Up @@ -445,6 +456,7 @@ def _format_frame(

locallogs.addHandler(file)
coloredlogs.install(level=logging.INFO, logger=locallogs)
header_data = None

while 1:
if frame_buffer_queue.qsize() > 0: # Higher is safe but lower is fast.
Expand Down Expand Up @@ -507,9 +519,10 @@ def _format_frame(
img = np.frombuffer(pixel_vector.tobytes(), dtype=np.uint8)
imagearray.put(img)

locallogs.info(
"frame: {}, bits lost: {}".format(header_data.frame_num, nbit_lost)
)
if header_data is not None:
locallogs.info(
"frame: {}, bits lost: {}".format(header_data.frame_num, nbit_lost)
)

# COM port should probably be automatically found but not sure yet how to distinguish with other devices.
def capture(
Expand Down Expand Up @@ -764,8 +777,8 @@ def updateDevice():


def main():
daq_inst = stream_daq()
args = daqParser.parse_args()
daq_inst = stream_daq()

if args.source == "UART":
try:
Expand All @@ -789,13 +802,8 @@ def main():
daq_inst.capture(source="uart", comport=comport, baudrate=baudrate)

if args.source == "OK":
HAVE_OK = False
try:
from miniscope_io.devices.opalkelly import okDev

HAVE_OK = True
except (ImportError, ModuleNotFoundError) as e:
warnings.warn(f"Cannot import OpalKelly device, got exception {e}")
if not HAVE_OK:
raise ImportError('Requested Opal Kelly DAQ, but okDAQ could not be imported, got exception: {ok_error}')

daq_inst.capture(source="fpga")

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pushed HAVE_OK to begining of file and added instance of if not HAVE_OK

Expand Down
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