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debug #5

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AlexeySotkin and others added 30 commits November 23, 2018 13:29
Image type may be represented in llvm IR in two forms:
- OpenCL form, for example, '%opencl.image2d_ro_t',
- SPIRV form, for example, '%spirv.Image._void_1_0_0_0_0_0_0',
but in both cases it is the same image type and it should be mapped to
one SPIR-V type.
'cl_intel_subgroup' extension allows to use sub_group_barrier() built-in
with OpenCL 1.2/2.0. It requires to translate this built-in to
reqular (core) SPIR-V instruction OpControlBarrier.

Note: currently clag generates nothing representing vendor extensions
like 'cl_intel_subgroup'. So, SPIR-V translator doesn't check that the
extensions was enabled. It assumes that if a built-in or a type which
belong to one of supported extension used in the IR, this extensions is
enabled.
Fix translation of sampler initialization function
Update test for sampled image with the current version of LLVM IR
The patch changes mangling rules for types with qualifiers from SPIR1.2
to the latest version of Itanium mangling used in clang, which includes
* change in order of qualifiers: first mangles address space, then
  CVR-qualifiers,
* change in substitution rules: private address space is mangled to an
  empty string, but pointee type + private address space is supposed to
  be a substitutable entity even private address space is the only
  qualifier the pointer type has.
A sampler initialized with 0 value is introduced by
cl_intel_device_side_avc_motion_estimation extension.
…tor.

Instead of default enum initialization of "memory_order_*" constants
in SPIRV generator I declared them with specific values. It makes
declaration of these constants in SPIRV generator consistent with
corresponding constants produced by Clang avoiding any inconsistence.

Change-Id: Ida3b373475c248675e1f6adac3b682263a334420
* Change SPIR-V Writer/Reader to consume/produce LLVM IR with blocks and
device side enqueue built-ins as it is produced by clang
* Improve function pointers removal related to OpenCL 2.0 blocks
* Improve tests
* Fix translation of literal structs
…onosGroup#53)

* Adding asserts to prevent possible dereference of a null pointer
* Adding return statements after llvm_unreachable
Removed LIT_SITE_CFG_IN_FOOTER as in llvm repo as in llvm
https://reviews.llvm.org/D51357
Starting from version 3.8 clang generates unmangled names for pipe built-ins.
Plus reflect changes in LLVM IR introduced by https://reviews.llvm.org/D46015.
There are two separate types for read only and write only pipes:
opencl.pipe_ro_t and opencl.pipe_wo_t instead of opencl.pipe_t.

Changes:
* Update SPIRVWriter to consume LLVM IR with non-mangled pipe built-ins.

* Align SPIRV Translator to consume and produce new pipe types. Old ones are no
longer supported.

* Change translation flow to not to convert new pipe types to
spirv-friendly format (like spirv.Pipe._0 or spirv.Pipe._1) before translation.
Spirv-friendly format for pipes is still supported for consuming or producing.
When llvm-spirv is built out of LLVM tree there might be two cases:
- SPIR-V library linked statically. This this case linker and loader are
  able to handle LLVM symbols correctly.
- SPIR-V library linked dynamically. LLVM_LINK_COMPONENTS is ignored as
  all LLVM components is supposed to be linked into libLLVM.so and we
  should explicitly link with SPIR-V library.

If we build llvm-spirv tool in LLVM tree explicit link with SPIR-V
library might lead to multiple symbol definition (e.g. SPIR-V library
linked with libLLVM.so as LLVM component and with llmv-spirv tool via
explicit target_link_library command).
LLVM lifetime intrinsics accept only i8* pointers + size as object
descriptors, so typical pattern for local variables is
alloca+bitcast+lifetime instructions.
SPIR-V translator tries store original type into lifetime instruction
looking though bitcast. It also removes bitcast from the SPIR-V file and
tries to recover it during SPIR-V conversion.
This patch simplifies the translation by keeping bitcast instruction and
fixes assertion of lifetime intrinsics for 8-bit objects.
Some atomic instructions allow only integer result type
In PR KhronosGroup#65 the test was added to test/SPIRV/transcoding/OpSwitchEmpty.ll
instead of test/transcoding/OpSwitchEmpty.ll
Clang 4.0 and higher produces kernel argument metadata attached to a
kernel:
'define spir_kernel void @foo(..)  #0 !kernel_arg_addr_space !1 ... {}'
'!1 = !{i32 1, i32 1}'

The patch updates SPIRVWriter to use metadata in this format.

'Old' format:
'!0 = !{void (float addrspace(1)*, ...)* @foo, !1, ...}'
'!1 = !{!"kernel_arg_addr_space", i32 1, ...}'
is no longer supported.

Also changing translation of !opencl.used.extension metadata to
OpSourceExtension instead of translation to OpExtension

Change-Id: I61d3890fb3bd1123ad71dc6857c8dfc419b288b6
Change-Id: If30b9b420649774b8a90cc9ad820e0f591d84161
Moving declarations of SPIRVWriter and LLVMToSPIRVDbgTran to SPIRVWriter.h
Moving declarations of SPIRVReader and SPIRVToLLVMDbgTran to SPIRVReader.h
Minor fixes.
Format of debug info for SPIR-V is described in the specification:
https://www.khronos.org/registry/spir-v/specs/1.0/DebugInfo.html

Debug info in LLVM is represented as metadata. Every debug info entry in LLVM
implemented as a class inhereted from MDNode. Translation of debug info should
be separated from translation of regrular instructions in order to avoid
circular dependencies. For debug info intrinsics which interleave with regular
instructions, we create placeholder instructions in SPIRV BB, which will be
ammended later, after debug info metadata translation. For debug info entries
represented as metadata we use llvm::DebugInfoFinder to collect them, then
iterate over and translate one by one. Translation of every entry goes through
transDbgEntry method, which caches the entry and call transDbgEntryImpl.
transDbgEntryImpl selects a corresponding method for translation of the debug
entry to SPIRV. Opcodes, flags, indices of operands, etc are descried in
SPIRV.debug.h There is enum for operand indices for each SPIRV debug
instruction. To avoid name clashes each enum is declared in a separate namespace
corresponding to the instruction.

Translation back to LLVM IR is done similarly: We go over debug instructions
stored in SPIRVModuleImpl::DebugInstVec and translate them with
SPIRVToLLVMDbgTran::transDebugInst, which also cache debug instructions and call
SPIRVToLLVMDbgTran::transDebugInstImpl. SPIRVToLLVMDbgTran::transDebugInstImpl
selects corresponding method to translate the debug instruction. SPIRV Debug
info instructions representing intrinsics are translated after other debug
instrucions.
AlexeySotkin and others added 4 commits November 27, 2018 14:26
Previously we relied on !opencl.enable.FP_CONTRACT metadata to set
ContractionOff execution mode for a kernel. But now clang doesn't generate
this metadata. Due to lack of reliable mechanism for representation of the
pragma in LLVM IR, this patch implements sort of very primitive heuristic
to detect usage of #pragma OPENCL FP_CONTRACT OFF.
try to find and use ccache when building outside of LLVM source tree.

Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
If the user has requested `kernel_arg_name` metadata, always generate
it even if some or all of the kernel arguments are unnamed.

The `-spirv-gen-kernel-arg-name-md` option seems to be lacking tests
so far, so add a new test.
Change-Id: If39ae46d1dac95114c0bfaf9531115c13f8f0534
@AlexeySotkin AlexeySotkin force-pushed the tmp branch 10 times, most recently from 247a137 to 78422f8 Compare November 28, 2018 12:53
@AlexeySotkin AlexeySotkin force-pushed the llvm_release_70 branch 6 times, most recently from ced36b6 to 9b12e3d Compare December 24, 2018 16:25
@AlexeySotkin AlexeySotkin force-pushed the llvm_release_70 branch 6 times, most recently from 5c379e2 to 83ee18b Compare May 29, 2019 09:27
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