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[XPU] fix several unit tests (PaddlePaddle#70479)
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* [XPU] fix several unit tests

* [XPU] fix several unit tests
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@houj04
houj04 authored Dec 27, 2024
1 parent 063b11a commit 2e2b3de
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Showing 15 changed files with 82 additions and 59 deletions.
1 change: 1 addition & 0 deletions paddle/phi/backends/xpu/xpu2_op_list.cc
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Original file line number Diff line number Diff line change
Expand Up @@ -193,6 +193,7 @@ XPUOpMap& get_kl2_ops() {
phi::DataType::BOOL,
phi::DataType::INT8,
phi::DataType::UINT8,
phi::DataType::INT16,
phi::DataType::INT64,
phi::DataType::INT32})},
{"check_finite_and_unscale",
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2 changes: 2 additions & 0 deletions paddle/phi/backends/xpu/xpu3_op_list.cc
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Expand Up @@ -96,6 +96,7 @@ XPUOpMap& get_kl3_ops() {
phi::DataType::BOOL})},
{"assign_value",
XPUKernelSet({phi::DataType::FLOAT32,
phi::DataType::FLOAT64,
phi::DataType::INT32,
phi::DataType::INT64,
phi::DataType::FLOAT16,
Expand Down Expand Up @@ -215,6 +216,7 @@ XPUOpMap& get_kl3_ops() {
phi::DataType::BOOL,
phi::DataType::INT8,
phi::DataType::UINT8,
phi::DataType::INT16,
phi::DataType::INT64,
phi::DataType::INT32})},
{"check_finite_and_unscale",
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1 change: 1 addition & 0 deletions paddle/phi/kernels/cpu/flatten2_grad_kernel.cc
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Expand Up @@ -25,5 +25,6 @@ PD_REGISTER_KERNEL(flatten2_grad,
uint8_t,
int,
int8_t,
int16_t,
int64_t,
bool) {}
1 change: 1 addition & 0 deletions paddle/phi/kernels/cpu/flatten2_kernel.cc
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Original file line number Diff line number Diff line change
Expand Up @@ -25,5 +25,6 @@ PD_REGISTER_KERNEL(flatten2,
uint8_t,
int,
int8_t,
int16_t,
int64_t,
bool) {}
1 change: 1 addition & 0 deletions paddle/phi/kernels/cpu/pad_grad_kernel.cc
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Expand Up @@ -24,6 +24,7 @@ PD_REGISTER_KERNEL(pad_grad,
phi::PadGradKernel,
float,
double,
int16_t,
int,
int64_t,
phi::dtype::complex<float>,
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1 change: 1 addition & 0 deletions paddle/phi/kernels/cpu/pad_kernel.cc
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Original file line number Diff line number Diff line change
Expand Up @@ -24,6 +24,7 @@ PD_REGISTER_KERNEL(pad,
phi::PadKernel,
float,
double,
int16_t,
int,
int64_t,
phi::dtype::complex<float>,
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1 change: 1 addition & 0 deletions paddle/phi/kernels/flatten_grad_kernel.cc
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Original file line number Diff line number Diff line change
Expand Up @@ -45,6 +45,7 @@ PD_REGISTER_KERNEL(flatten_grad,
double,
uint8_t,
int8_t,
int16_t,
int,
int64_t,
bool) {}
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31 changes: 0 additions & 31 deletions paddle/phi/kernels/reshape_kernel.cc
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Original file line number Diff line number Diff line change
Expand Up @@ -19,9 +19,6 @@
#include "paddle/phi/core/tensor_utils.h"
#include "paddle/phi/infermeta/unary.h"
#include "paddle/phi/kernels/funcs/common_shape.h"
#ifdef PADDLE_WITH_XPU
#include "paddle/phi/backends/xpu/enforce_xpu.h"
#endif

namespace phi {

Expand All @@ -46,34 +43,6 @@ void ReshapeKernel(const Context& dev_ctx,
out->ResetLoD(x.lod());
}

#ifdef PADDLE_WITH_XPU
template <>
void ReshapeKernel<phi::XPUContext>(const XPUContext& dev_ctx,
const DenseTensor& x,
const IntArray& shape,
DenseTensor* out) {
MetaTensor meta_out(out);
InferMetaFromVecValue(x, shape.GetData(), &meta_out);

if (x.initialized() && x.Holder() == out->Holder()) {
dev_ctx.Alloc(out, x.dtype());
return;
}
dev_ctx.Alloc(out, x.dtype());
auto dims = out->dims();
auto* src_ptr = x.data();
auto* dst_ptr = out->data();
auto size = x.numel() * phi::SizeOf(x.dtype());
int ret = xpu::copy(dev_ctx.x_context(),
reinterpret_cast<const int8_t*>(src_ptr),
reinterpret_cast<int8_t*>(dst_ptr),
size);
PADDLE_ENFORCE_XDNN_SUCCESS(ret, "copy");
out->Resize(dims);
out->ResetLoD(x.lod());
}
#endif

template <typename Context>
void ReshapeWithXShapeKernel(const Context& dev_ctx,
const DenseTensor& x,
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1 change: 1 addition & 0 deletions paddle/phi/kernels/xpu/cast_kernel.cc
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Original file line number Diff line number Diff line change
Expand Up @@ -124,6 +124,7 @@ PD_REGISTER_KERNEL(cast,
XPU,
ALL_LAYOUT,
phi::CastKernel,
int16_t,
int32_t,
float,
phi::dtype::float16,
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16 changes: 13 additions & 3 deletions test/dygraph_to_static/test_tensor_to.py
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Original file line number Diff line number Diff line change
Expand Up @@ -25,6 +25,7 @@
)

import paddle
from paddle import base

# NOTE: only test in PIR mode

Expand All @@ -38,19 +39,20 @@
"int32",
"int64",
"uint8",
"complex64",
"complex128",
"bool",
]
] + ([] if base.core.is_compiled_with_xpu() else ["complex64", "complex128"])

_cpu_place = "Place(cpu)"
_gpu_place = "Place(gpu:0)"
_xpu_place = "Place(xpu:0)"


def place_res():
def res():
if paddle.is_compiled_with_cuda():
return _gpu_place
elif paddle.is_compiled_with_xpu():
return _xpu_place
else:
return _cpu_place

Expand Down Expand Up @@ -125,6 +127,8 @@ def test_tensor_to_dtype(self):
def test_tensor_to_device(self):
if paddle.is_compiled_with_cuda():
x = paddle.to_tensor([1, 2, 3], place="gpu")
elif paddle.is_compiled_with_xpu():
x = paddle.to_tensor([1, 2, 3], place="xpu")
else:
x = paddle.to_tensor([1, 2, 3])

Expand All @@ -136,6 +140,8 @@ def test_tensor_to_device(self):
def test_tensor_to_device2(self):
if paddle.is_compiled_with_cuda():
x = paddle.to_tensor([1, 2, 3], place="gpu")
elif paddle.is_compiled_with_xpu():
x = paddle.to_tensor([1, 2, 3], place="xpu")
else:
x = paddle.to_tensor([1, 2, 3])

Expand All @@ -150,6 +156,8 @@ def test_tensor_to_device_dtype(self):
places = ["cpu"]
if paddle.is_compiled_with_cuda():
places.append("gpu")
if paddle.is_compiled_with_xpu():
places.append("xpu")
for dtype in _valid_dtypes:
for place in places:
tensor_x = paddle.jit.to_static(to_device_dtype)(
Expand All @@ -158,6 +166,8 @@ def test_tensor_to_device_dtype(self):
place_x_str = str(tensor_x.place)
if "gpu" == place:
self.assertEqual(place_x_str, _gpu_place)
elif "xpu" == place:
self.assertEqual(place_x_str, _xpu_place)
else:
self.assertEqual(place_x_str, _cpu_place)
type_x_str = str(tensor_x.dtype)
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8 changes: 8 additions & 0 deletions test/dygraph_to_static/test_to_tensor.py
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Original file line number Diff line number Diff line change
Expand Up @@ -40,6 +40,8 @@ def case1(x):
def case2(x):
if core.is_compiled_with_cuda():
place = paddle.CUDAPlace(0)
elif core.is_compiled_with_xpu():
place = paddle.XPUPlace(0)
else:
place = paddle.CPUPlace()
a = paddle.to_tensor(
Expand All @@ -53,6 +55,8 @@ def case3(x):
paddle.set_default_dtype("float64")
if core.is_compiled_with_cuda():
place = paddle.CUDAPlace(0)
elif core.is_compiled_with_xpu():
place = paddle.XPUPlace(0)
else:
place = paddle.CPUPlace()
a = paddle.to_tensor([1.0, 2.0, 3.0], place=place)
Expand All @@ -64,6 +68,8 @@ def case4(x):
paddle.set_default_dtype("float64")
if core.is_compiled_with_cuda():
place = paddle.CUDAPlace(0)
elif core.is_compiled_with_xpu():
place = paddle.XPUPlace(0)
else:
place = paddle.CPUPlace()
a = paddle.to_tensor([1], place=place)
Expand Down Expand Up @@ -182,6 +188,8 @@ def test_static(self):
with paddle.static.program_guard(main_prog, startup_prog):
if core.is_compiled_with_cuda():
place = paddle.CUDAPlace(0)
elif core.is_compiled_with_xpu():
place = paddle.XPUPlace(0)
else:
place = paddle.CPUPlace()

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26 changes: 18 additions & 8 deletions test/legacy_test/test_Tensor_to.py
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Original file line number Diff line number Diff line change
Expand Up @@ -31,10 +31,12 @@ def test_Tensor_to_dtype(self):
"int32",
"int64",
"uint8",
"complex64",
"complex128",
"bool",
]
] + (
[]
if base.core.is_compiled_with_xpu()
else ["complex64", "complex128"]
)
for dtype in valid_dtypes:
tensorx = tensorx.to(dtype)
typex_str = str(tensorx.dtype)
Expand All @@ -46,11 +48,14 @@ def test_Tensor_to_device(self):
if base.core.is_compiled_with_cuda():
places.append("gpu:0")
places.append("gpu")
if base.core.is_compiled_with_xpu():
places.append("xpu:0")
places.append("xpu")

for place in places:
tensorx = tensorx.to(place)
placex_str = str(tensorx.place)
if place == "gpu":
if place == "gpu" or place == "xpu":
self.assertTrue(placex_str, "Place(" + place + ":0)")
else:
self.assertTrue(placex_str, "Place(" + place + ")")
Expand All @@ -68,6 +73,9 @@ def test_Tensor_to_device_dtype(self):
if base.core.is_compiled_with_cuda():
places.append("gpu:0")
places.append("gpu")
if base.core.is_compiled_with_xpu():
places.append("xpu:0")
places.append("xpu")
valid_dtypes = [
"bfloat16",
"float16",
Expand All @@ -78,15 +86,17 @@ def test_Tensor_to_device_dtype(self):
"int32",
"int64",
"uint8",
"complex64",
"complex128",
"bool",
]
] + (
[]
if base.core.is_compiled_with_xpu()
else ["complex64", "complex128"]
)
for dtype in valid_dtypes:
for place in places:
tensorx = tensorx.to(place, dtype)
placex_str = str(tensorx.place)
if place == "gpu":
if place == "gpu" or place == "xpu":
self.assertTrue(placex_str, "Place(" + place + ":0)")
else:
self.assertTrue(placex_str, "Place(" + place + ")")
Expand Down
11 changes: 6 additions & 5 deletions test/legacy_test/test_dygraph_multi_forward.py
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Original file line number Diff line number Diff line change
Expand Up @@ -188,11 +188,12 @@ def test_mnist_forward_float32(self):
paddle.framework.random._manual_program_seed(SEED)
else:
paddle.framework.random._manual_program_seed(SEED)
exe = base.Executor(
base.CPUPlace()
if not core.is_compiled_with_cuda()
else base.CUDAPlace(0)
)
if core.is_compiled_with_cuda():
exe = base.Executor(base.CUDAPlace(0))
elif core.is_compiled_with_xpu():
exe = base.Executor(base.XPUPlace(0))
else:
exe = base.Executor(base.CPUPlace())

mnist = MNIST()
sgd = paddle.optimizer.SGD(learning_rate=1e-3)
Expand Down
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