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chore: Switch to using test_data_ssa_refactor for acir_tests #626

Merged
merged 11 commits into from
Jul 25, 2023
4 changes: 2 additions & 2 deletions acir_tests/run_acir_tests.sh
Original file line number Diff line number Diff line change
Expand Up @@ -18,10 +18,10 @@ if [ ! -d acir_tests ]; then
git clone -b $BRANCH --filter=blob:none --no-checkout https://github.com/noir-lang/noir.git
cd noir
git sparse-checkout init --cone
git sparse-checkout set crates/nargo_cli/tests/test_data
git sparse-checkout set crates/nargo_cli/tests/test_data_ssa_refactor
git checkout
cd ..
mv noir/crates/nargo_cli/tests/test_data acir_tests
mv noir/crates/nargo_cli/tests/test_data_ssa_refactor acir_tests
rm -rf noir
fi
fi
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56 changes: 55 additions & 1 deletion cpp/src/barretenberg/dsl/acir_format/acir_to_constraint_buf.hpp
Original file line number Diff line number Diff line change
@@ -1,6 +1,7 @@
#pragma once
#include "acir_format.hpp"
#include "barretenberg/common/container.hpp"
#include "barretenberg/common/throw_or_abort.hpp"
#include "barretenberg/dsl/acir_format/blake2s_constraint.hpp"
#include "barretenberg/dsl/acir_format/block_constraint.hpp"
#include "barretenberg/dsl/acir_format/ecdsa_secp256k1.hpp"
Expand Down Expand Up @@ -233,6 +234,44 @@ void handle_memory(Circuit::MemoryBlock const& mem_block, bool is_ram, acir_form
af.block_constraints.push_back(BlockConstraint{ .init = init, .trace = trace, .type = (BlockType)is_ram });
}

BlockConstraint handle_memory_init(Circuit::Opcode::MemoryInit const& mem_init)
{
BlockConstraint block{ .init = {}, .trace = {}, .type = BlockType::ROM };
std::vector<poly_triple> init;
std::vector<MemOp> trace;

auto len = mem_init.init.size();
for (size_t i = 0; i < len; ++i) {
block.init.push_back(poly_triple{
.a = mem_init.init[i].value,
.b = 0,
.c = 0,
.q_m = 0,
.q_l = 1,
.q_r = 0,
.q_o = 0,
.q_c = 0,
});
}
return block;
}

void handle_memory_op(Circuit::Opcode::MemoryOp const& mem_op, BlockConstraint& block)
{
uint8_t access_type = 1;
if (mem_op.op.is_rom()) {
access_type = 0;
}
if (block.type == BlockType::ROM && access_type == 1) {
block.type = BlockType::RAM;
}

MemOp acir_mem_op = MemOp{ .access_type = access_type,
.index = serialize_arithmetic_gate(mem_op.op.index),
.value = serialize_arithmetic_gate(mem_op.op.value) };
block.trace.push_back(acir_mem_op);
}

acir_format circuit_buf_to_acir_format(std::vector<uint8_t> const& buf)
{
auto circuit = Circuit::Circuit::bincodeDeserialize(buf);
Expand All @@ -241,7 +280,7 @@ acir_format circuit_buf_to_acir_format(std::vector<uint8_t> const& buf)
af.varnum = circuit.current_witness_index + 1;
af.public_inputs = join({ map(circuit.public_parameters.value, [](auto e) { return e.value; }),
map(circuit.return_values.value, [](auto e) { return e.value; }) });

std::map<uint32_t, BlockConstraint> block_id_to_block_constraint;
for (auto gate : circuit.opcodes) {
std::visit(
[&](auto&& arg) {
Expand All @@ -254,10 +293,25 @@ acir_format circuit_buf_to_acir_format(std::vector<uint8_t> const& buf)
handle_memory(arg.value, true, af);
} else if constexpr (std::is_same_v<T, Circuit::Opcode::ROM>) {
handle_memory(arg.value, false, af);
} else if constexpr (std::is_same_v<T, Circuit::Opcode::MemoryInit>) {
auto block = handle_memory_init(arg);
uint32_t block_id = arg.block_id.value;
block_id_to_block_constraint[block_id] = block;
} else if constexpr (std::is_same_v<T, Circuit::Opcode::MemoryOp>) {
auto block = block_id_to_block_constraint.find(arg.block_id.value);
if (block == block_id_to_block_constraint.end()) {
throw_or_abort("unitialized MemoryOp");
}
handle_memory_op(arg, block->second);
}
},
gate.value);
}
for (const auto& [block_id, block] : block_id_to_block_constraint) {
if (!block.trace.empty()) {
af.block_constraints.push_back(block);
}
}
return af;
}

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