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[NUCLEO_F030R8] 16-bit timer register update
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This path fixes issue ARMmbed#816.

Current value of TIM_MST->CNT is read in interrupt context only.
This avoids master timer overflow without SlaveCounter update.

Change-Id: I8e2ec02ce7539a4c044c7e3dfe6bedc9fcdf7736
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BartSX committed May 23, 2016
1 parent 82d82d0 commit 01ff0b9
Showing 1 changed file with 3 additions and 2 deletions.
Original file line number Diff line number Diff line change
Expand Up @@ -43,6 +43,7 @@ void set_compare(uint16_t count);
extern volatile uint32_t SlaveCounter;
extern volatile uint32_t oc_int_part;
extern volatile uint16_t oc_rem_part;
extern volatile uint16_t cnt_val;

// Used to increment the slave counter
void timer_update_irq_handler(void)
Expand All @@ -59,7 +60,7 @@ void timer_update_irq_handler(void)
// Used for mbed timeout (channel 1) and HAL tick (channel 2)
void timer_oc_irq_handler(void)
{
uint16_t cval = TIM_MST->CNT;
cnt_val = TIM_MST->CNT;
TimMasterHandle.Instance = TIM_MST;

// Channel 1 for mbed timeout
Expand All @@ -71,7 +72,7 @@ void timer_oc_irq_handler(void)
} else {
if (oc_int_part > 0) {
set_compare(0xFFFF);
oc_rem_part = cval; // To finish the counter loop the next time
oc_rem_part = cnt_val; // To finish the counter loop the next time
oc_int_part--;
} else {
us_ticker_irq_handler();
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