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improves the setw function used by the aarch64 lifter #1454

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Merged
ivg merged 1 commit into from
Mar 29, 2022
Merged

improves the setw function used by the aarch64 lifter #1454

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10 changes: 2 additions & 8 deletions plugins/arm/semantics/arm-bits.lisp
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Original file line number Diff line number Diff line change
Expand Up @@ -17,8 +17,7 @@
(defun add-with-carry/clear-base (rd x y c)
(let ((r (+ c y x)))
(set-flags r y x)
(clear-base rd)
(set$ rd r)))
(setw rd r)))

(defun add-with-carry/it-block (rd x y c cnd)
(when (condition-holds cnd)
Expand Down Expand Up @@ -60,11 +59,6 @@
(defun is-unconditional (cnd)
(= cnd 0b1110))

(defun clear-base (reg)
(set$ (alias-base-register reg) 0))

(defmacro setw (reg val)
"(set Wx V) sets a Wx register clearing the upper 32 bits."
(let ((res val))
(clear-base reg)
(set$ reg res)))
(set$ (alias-base-register reg) val))