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Disables Thumb 2 branch instructions in the legacy ARM lifter #1456

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06ee098
Update LLVM backend to work with version 12
bmourad01 Oct 23, 2021
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bmourad01 Mar 29, 2022
0156e57
Ignore Thumb 2 branch instructions in the legacy ARM lifter
Mar 29, 2022
9867c7b
Fix semantics of `TBB/TBH`
Mar 30, 2022
f955891
Merge branch 'BinaryAnalysisPlatform:master' into master
bmourad01 Mar 30, 2022
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Merge branch 'master' of https://github.com/bmourad01/bap into fix-t2…
Mar 30, 2022
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7 changes: 5 additions & 2 deletions lib/arm/arm_insn.ml
Original file line number Diff line number Diff line change
Expand Up @@ -9,8 +9,11 @@ let is_thumb2 = String.is_prefix ~prefix:"t2"
let recode_as_arm = String.chop_prefix_exn ~prefix:"t2"

let of_name name =
let name = if is_thumb2 name then recode_as_arm name else name in
sexpable_of_string t_of_sexp name
let is_t2 = is_thumb2 name in
let name = if is_t2 then recode_as_arm name else name in
match sexpable_of_string t_of_sexp name with
| Some #Arm_types.branch_insn when is_t2 -> None
| t -> t

let of_basic insn = of_name (Disasm_expert.Basic.Insn.name insn)
let create insn = of_name (Insn.name insn)
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17 changes: 17 additions & 0 deletions plugins/arm/semantics/thumb.lisp
Original file line number Diff line number Diff line change
Expand Up @@ -94,6 +94,23 @@
(when (condition-holds pre)
(exec-addr (+ (t2pc) off))))

(defun t2Bcc (off pre _)
"bcc.w imm"
(when (condition-holds pre)
(exec-addr (+ (t2pc) off))))

(defun t2TBB (rn rm _ _)
"tbb [rn, rm]"
(let ((addr (+ (t2reg rn) (t2reg rm)))
(halfwords (cast-unsigned 32 (load-bits 8 addr))))
(exec-addr (+ (t2pc) (* halfwords 2)))))

(defun t2TBH (rn rm _ _)
"tbh [rn, rm, lsl #1]"
(let ((addr (+ (t2reg rn) (lshift rm 1)))
(halfwords (cast-unsigned 32 (load-hword addr))))
(exec-addr (+ (t2pc) (* halfwords 2)))))

(defun t2LDRs (rt rn rm imm pre _)
(when (condition-holds pre)
(t2set rt (load-word (+ rn (lshift rm imm))))))
Expand Down