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Tracewrap 8.1 hexagon #38

Merged
merged 55 commits into from
Dec 14, 2023
Merged

Tracewrap 8.1 hexagon #38

merged 55 commits into from
Dec 14, 2023

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Rot127
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@Rot127 Rot127 commented Dec 1, 2023

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@Rot127
Rest of unfinished hexagon work.
cc8ea23
@Rot127
Add trace function defintions to helper.h
f6d5fe3
@Rot127
Add trace helper functions.
3ca6426
@Rot127
Remove any tracing code from original files for now.
cd18254
@Rot127
Log trace events
a3c83e1
@Rot127
Fix defintions
22adcc5
@Rot127
Fix several build errors.
6ce7b24
@Rot127
Add first logging of register reads.
f593f2c
@Rot127
Trace frame begins and ends
7644743
@Rot127
Log register read and writes
55320d6
@Rot127
Log traps with endframe
8959e9f
@Rot127
Generate register reads, instead of having them in get_result_gpr.
7e1f0e2 
Otherwise too many reads get logged and would lead to conflicts when comparing the traces.
@Rot127
Add load_reg tracing only for rw regs. Not also w regs.
73a57f2
@Rot127
Generate load traces
064998e
@Rot127
Trace memory stores.
2d0bb4c
@Rot127
Rework and add some register logging
e0826b6
@Rot127
Emit register names instead of numbers
a4ee5e7
@Rot127
Set actually passed parameter type.
5caf326
@Rot127
Trace gpr/ctrl load/store
3043c11
@Rot127
Trace register pair load/store
f3854bf
@Rot127
Trace predicate reg load/stores
542f931
@Rot127
Rename hexagon_regnames -> hex_regnames (use our names)
0ba9b9e
@Rot127
Pass size in bytes, not in bits.
3ef8614
@Rot127
Move vector trace functions to bottom of file for order.
d0168fe
@Rot127
Clean up comments
aa359dc
@Rot127
Remove unused function.
37494bd
@Rot127
Pass complete size of packet, not just number of instructions.
0604b2d
@Rot127
1byte = 8bits -.-
d54181f
@Rot127
Trace register writes during packet commit.
a73469f
@Rot127
Always log prediate reads.
c0dd0ed
Rot127 and others added 25 commits November 29, 2023 13:00
@Rot127
Remove tracing of double register.
ca1acf1
@Rot127
Fix: call correct helper
b30aaaf
@Rot127
Add many more traces of reg loads and stores of new/normal
0f53455
@Rot127
Add several traces of PC stores.
494b336
@Rot127
Trace write to PC for end of packet
20df215
@Rot127
Add initial load of PC.
299d184
@Rot127
Check for new or old pred write
1607083
@Rot127
Remove loggin of PC
eb130f8
@Rot127
Determine num of instructions for fram ends by packet size. Since num…
b060149 
…_insn omits immext.
@Rot127
Log all loads at the beginning of a packet to prevent incorrect Pre-O…
b517697 
…perand setting
@Rot127
Fix: Pass MemOps to tracing functions. Not byte numbers.
20d9724
@Rot127
Check needs_commit falg before writing the .new or the non new reg
0e254a5
@Rot127
Fix logging of endframe.
bf8368c
@Rot127
Set the .new register as Pre-Operands the non-tmp registers.
446f616
@Rot127
Trace USR writes
b86e108
@Rot127
Track the LC0 decrement writes properly.
06dfc2a
@Rot127
Fix: hex_gpr doesn't track the PC always reliable. remove tracking of…
533f37c 
… it.
@Rot127
Trace correct register C5 insteaed of C4
fc36859
@Rot127
Dont use get_gpr since it messes up the execution.
3714305
@Rot127
Fix tracking of LC0
03a7a1b
@Rot127
Add build job for Hexagon
dad6bc1
@Rot127 @ivg
Update .github/workflows/build.yaml
5d23c29 
Co-authored-by: Ivan Gotovchits <ivg@ieee.org>
@Rot127
Use checkout action to clone BAP repos.
0d2ea72
@Rot127
Add missing libprotobuf-c-dev dep
9180073
@Rot127
Remove ref from checkout action.
6fd0350
@Rot127
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Rot127 commented Dec 13, 2023

@ivg Can I merge this? It's the same as #34.

@ivg ivg merged commit 3ab48d3 into BinaryAnalysisPlatform:tracewrap-8.1-hexagon Dec 14, 2023
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@Rot127 @ivg