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morello atomic: Trim gcvalue from the spin loop of arithmetic atomics #2249

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merged 1 commit into from
Dec 3, 2024

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@bsdjhb bsdjhb commented Nov 15, 2024

Use a ptraddr_t as the input that can be assigned to the register
constraint as is done for RISC-V. This allows the compiler to either
hoist the gcvalue out of the loop, or to just use the x portion of the
relevant register.

Use a ptraddr_t as the input that can be assigned to the register
constraint as is done for RISC-V.  This allows the compiler to either
hoist the gcvalue out of the loop, or to just use the x portion of the
relevant register.
@bsdjhb bsdjhb requested a review from jrtc27 November 15, 2024 16:25
@@ -667,21 +667,19 @@ static __inline void \
atomic_##op##_##bar##ptr(volatile uintptr_t *p, uintptr_t val) \
{ \
uintptr_t previous; \
ptraddr_t tmp1, tmp2; \
ptraddr_t tmp; \
int res; \
\
__asm __volatile( \
"1:" \
"ld" #a "xr %0, [%4]\n" \
"gcvalue %2, %0\n" \
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This could be eliminated if there was an equivalent to %wN to denote the X version of the C register as then we could use that as the second operand in the scvalue instruction below.

@bsdjhb bsdjhb merged commit 1237cbe into CTSRD-CHERI:dev Dec 3, 2024
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@bsdjhb bsdjhb deleted the morello_atomic branch December 3, 2024 15:01
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2 participants