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CHERI-RISC-V As-User instructions and plumbing #193

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@nwf nwf commented Nov 8, 2021

Much of the plumbing was done for Morello support already (huzzah).

@nwf nwf requested review from jrtc27 and arichardson November 8, 2021 23:26
@nwf nwf force-pushed the 202111-riscv-cap-as-user branch 2 times, most recently from 46b0cb9 to e4312c6 Compare November 8, 2021 23:44
We need to assert PAGE_SC_TRAP if either PTE_CW or PTE_CD are clear, as
otherise we can end up caching a TLB entry without SC_TRAP for a PTE
that's merely got PTE_CW without PTE_CD turned on.

This is similar to the existing logic around PTE_D.
For targets that composite their decode trees out of multiple files,
properly track the dependency.  This is a little gross in that it relies
on the decodetree script to tell the build system what the build system
already knows, in some sense, but it was the least invasive option that
came to mind as the existing interface does not distinguish betweeen
extra files and extra command line arguments to the decodetree script.
MMU_USER_IDX is not widely used in riscv, but looking at other
architectures it appears that the intent of the symbol is to name the
userspace mmu_idx.
- Restructure the code under the assumption that there will be HINT consumers
  other than TCG_LOG_INSTR.

- Document the current and near-term allocations of the opcode space:

  - Move the TCG_LOG_INSTR tests to match rs1 == x0, which is the only form that
    we have emitted, but we were never ignoring rs1.

  - Reserve `SLTI x0, x31, 0xNNN` forms for software's introspective use until
    (and if) RISC-V upstream defines something for that use case.
@nwf nwf force-pushed the 202111-riscv-cap-as-user branch from e4312c6 to 3e403f9 Compare November 11, 2021 19:47
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