Rollup merge of rust-lang#58257 - taiki-e:librustc_target-2018, r=Cen…

…tril

librustc_target => 2018

Transitions `librustc_target` to Rust 2018; cc rust-lang#58099

r? @Centril

src/librustc_target/Cargo.toml

@@ -2,6 +2,7 @@
 authors = ["The Rust Project Developers"]
 name = "rustc_target"
 version = "0.0.0"
+edition = "2018"
 
 [lib]
 name = "rustc_target"

src/librustc_target/abi/call/aarch64.rs

@@ -1,5 +1,5 @@
-use abi::call::{FnType, ArgType, Reg, RegKind, Uniform};
-use abi::{HasDataLayout, LayoutOf, TyLayout, TyLayoutMethods};
+use crate::abi::call::{FnType, ArgType, Reg, RegKind, Uniform};
+use crate::abi::{HasDataLayout, LayoutOf, TyLayout, TyLayoutMethods};
 
 fn is_homogeneous_aggregate<'a, Ty, C>(cx: &C, arg: &mut ArgType<'a, Ty>)
  -> Option<Uniform>

src/librustc_target/abi/call/amdgpu.rs

@@ -1,5 +1,5 @@
-use abi::call::{ArgType, FnType, };
-use abi::{HasDataLayout, LayoutOf, TyLayout, TyLayoutMethods};
+use crate::abi::call::{ArgType, FnType, };
+use crate::abi::{HasDataLayout, LayoutOf, TyLayout, TyLayoutMethods};
 
 fn classify_ret_ty<'a, Ty, C>(_cx: &C, ret: &mut ArgType<'a, Ty>)
  where Ty: TyLayoutMethods<'a, C> + Copy,

src/librustc_target/abi/call/arm.rs

@@ -1,6 +1,6 @@
-use abi::call::{Conv, FnType, ArgType, Reg, RegKind, Uniform};
-use abi::{HasDataLayout, LayoutOf, TyLayout, TyLayoutMethods};
-use spec::HasTargetSpec;
+use crate::abi::call::{Conv, FnType, ArgType, Reg, RegKind, Uniform};
+use crate::abi::{HasDataLayout, LayoutOf, TyLayout, TyLayoutMethods};
+use crate::spec::HasTargetSpec;
 
 fn is_homogeneous_aggregate<'a, Ty, C>(cx: &C, arg: &mut ArgType<'a, Ty>)
  -> Option<Uniform>

src/librustc_target/abi/call/asmjs.rs

@@ -1,5 +1,5 @@
-use abi::call::{FnType, ArgType, Uniform};
-use abi::{HasDataLayout, LayoutOf, TyLayout, TyLayoutMethods};
+use crate::abi::call::{FnType, ArgType, Uniform};
+use crate::abi::{HasDataLayout, LayoutOf, TyLayout, TyLayoutMethods};
 
 // Data layout: e-p:32:32-i64:64-v128:32:128-n32-S128
 
@@ -26,7 +26,7 @@ fn classify_ret_ty<'a, Ty, C>(cx: &C, ret: &mut ArgType<'a, Ty>)
  }
 }
 
-fn classify_arg_ty<Ty>(arg: &mut ArgType<Ty>) {
+fn classify_arg_ty<Ty>(arg: &mut ArgType<'_, Ty>) {
  if arg.layout.is_aggregate() {
  arg.make_indirect_byval();
  }

src/librustc_target/abi/call/hexagon.rs

@@ -1,24 +1,24 @@
 #![allow(non_upper_case_globals)]
 
-use abi::call::{FnType, ArgType};
+use crate::abi::call::{FnType, ArgType};
 
-fn classify_ret_ty<Ty>(ret: &mut ArgType<Ty>) {
+fn classify_ret_ty<Ty>(ret: &mut ArgType<'_, Ty>) {
  if ret.layout.is_aggregate() && ret.layout.size.bits() > 64 {
  ret.make_indirect();
  } else {
  ret.extend_integer_width_to(32);
  }
 }
 
-fn classify_arg_ty<Ty>(arg: &mut ArgType<Ty>) {
+fn classify_arg_ty<Ty>(arg: &mut ArgType<'_, Ty>) {
  if arg.layout.is_aggregate() && arg.layout.size.bits() > 64 {
  arg.make_indirect();
  } else {
  arg.extend_integer_width_to(32);
  }
 }
 
-pub fn compute_abi_info<Ty>(fty: &mut FnType<Ty>) {
+pub fn compute_abi_info<Ty>(fty: &mut FnType<'_,Ty>) {
  if !fty.ret.is_ignore() {
  classify_ret_ty(&mut fty.ret);
  }

src/librustc_target/abi/call/mips.rs

@@ -1,7 +1,7 @@
-use abi::call::{ArgType, FnType, Reg, Uniform};
-use abi::{HasDataLayout, LayoutOf, Size, TyLayoutMethods};
+use crate::abi::call::{ArgType, FnType, Reg, Uniform};
+use crate::abi::{HasDataLayout, LayoutOf, Size, TyLayoutMethods};
 
-fn classify_ret_ty<'a, Ty, C>(cx: &C, ret: &mut ArgType<Ty>, offset: &mut Size)
+fn classify_ret_ty<'a, Ty, C>(cx: &C, ret: &mut ArgType<'_, Ty>, offset: &mut Size)
  where Ty: TyLayoutMethods<'a, C>, C: LayoutOf<Ty = Ty> + HasDataLayout
 {
  if !ret.layout.is_aggregate() {
@@ -12,7 +12,7 @@ fn classify_ret_ty<'a, Ty, C>(cx: &C, ret: &mut ArgType<Ty>, offset: &mut Size)
  }
 }
 
-fn classify_arg_ty<'a, Ty, C>(cx: &C, arg: &mut ArgType<Ty>, offset: &mut Size)
+fn classify_arg_ty<'a, Ty, C>(cx: &C, arg: &mut ArgType<'_, Ty>, offset: &mut Size)
  where Ty: TyLayoutMethods<'a, C>, C: LayoutOf<Ty = Ty> + HasDataLayout
 {
  let dl = cx.data_layout();
@@ -34,7 +34,7 @@ fn classify_arg_ty<'a, Ty, C>(cx: &C, arg: &mut ArgType<Ty>, offset: &mut Size)
  *offset = offset.align_to(align) + size.align_to(align);
 }
 
-pub fn compute_abi_info<'a, Ty, C>(cx: &C, fty: &mut FnType<Ty>)
+pub fn compute_abi_info<'a, Ty, C>(cx: &C, fty: &mut FnType<'_, Ty>)
  where Ty: TyLayoutMethods<'a, C>, C: LayoutOf<Ty = Ty> + HasDataLayout
 {
  let mut offset = Size::ZERO;

src/librustc_target/abi/call/mips64.rs

@@ -1,7 +1,7 @@
-use abi::call::{ArgAttribute, ArgType, CastTarget, FnType, PassMode, Reg, RegKind, Uniform};
-use abi::{self, HasDataLayout, LayoutOf, Size, TyLayout, TyLayoutMethods};
+use crate::abi::call::{ArgAttribute, ArgType, CastTarget, FnType, PassMode, Reg, RegKind, Uniform};
+use crate::abi::{self, HasDataLayout, LayoutOf, Size, TyLayout, TyLayoutMethods};
 
-fn extend_integer_width_mips<Ty>(arg: &mut ArgType<Ty>, bits: u64) {
+fn extend_integer_width_mips<Ty>(arg: &mut ArgType<'_, Ty>, bits: u64) {
  // Always sign extend u32 values on 64-bit mips
  if let abi::Abi::Scalar(ref scalar) = arg.layout.abi {
  if let abi::Int(i, signed) = scalar.value {

src/librustc_target/abi/call/mod.rs

@@ -1,6 +1,6 @@
-use abi::{self, Abi, Align, FieldPlacement, Size};
-use abi::{HasDataLayout, LayoutOf, TyLayout, TyLayoutMethods};
-use spec::HasTargetSpec;
+use crate::abi::{self, Abi, Align, FieldPlacement, Size};
+use crate::abi::{HasDataLayout, LayoutOf, TyLayout, TyLayoutMethods};
+use crate::spec::{self, HasTargetSpec};
 
 mod aarch64;
 mod amdgpu;
@@ -42,13 +42,13 @@ pub enum PassMode {
 
 // Hack to disable non_upper_case_globals only for the bitflags! and not for the rest
 // of this module
-pub use self::attr_impl::ArgAttribute;
+pub use attr_impl::ArgAttribute;
 
 #[allow(non_upper_case_globals)]
 #[allow(unused)]
 mod attr_impl {
  // The subset of llvm::Attribute needed for arguments, packed into a bitfield.
- bitflags! {
+ bitflags::bitflags! {
  #[derive(Default)]
  pub struct ArgAttribute: u16 {
  const ByVal = 1 << 0;
@@ -526,22 +526,22 @@ pub struct FnType<'a, Ty> {
 }
 
 impl<'a, Ty> FnType<'a, Ty> {
- pub fn adjust_for_cabi<C>(&mut self, cx: &C, abi: ::spec::abi::Abi) -> Result<(), String>
+ pub fn adjust_for_cabi<C>(&mut self, cx: &C, abi: spec::abi::Abi) -> Result<(), String>
  where Ty: TyLayoutMethods<'a, C> + Copy,
  C: LayoutOf<Ty = Ty, TyLayout = TyLayout<'a, Ty>> + HasDataLayout + HasTargetSpec
  {
  match &cx.target_spec().arch[..] {
  "x86" => {
- let flavor = if abi == ::spec::abi::Abi::Fastcall {
+ let flavor = if abi == spec::abi::Abi::Fastcall {
  x86::Flavor::Fastcall
  } else {
  x86::Flavor::General
  };
  x86::compute_abi_info(cx, self, flavor);
  },
- "x86_64" => if abi == ::spec::abi::Abi::SysV64 {
+ "x86_64" => if abi == spec::abi::Abi::SysV64 {
  x86_64::compute_abi_info(cx, self);
- } else if abi == ::spec::abi::Abi::Win64 || cx.target_spec().options.is_like_windows {
+ } else if abi == spec::abi::Abi::Win64 || cx.target_spec().options.is_like_windows {
  x86_win64::compute_abi_info(self);
  } else {
  x86_64::compute_abi_info(cx, self);

src/librustc_target/abi/call/msp430.rs

@@ -1,31 +1,31 @@
 // Reference: MSP430 Embedded Application Binary Interface
 // http://www.ti.com/lit/an/slaa534/slaa534.pdf
 
-use abi::call::{ArgType, FnType};
+use crate::abi::call::{ArgType, FnType};
 
 // 3.5 Structures or Unions Passed and Returned by Reference
 //
 // "Structures (including classes) and unions larger than 32 bits are passed and
 // returned by reference. To pass a structure or union by reference, the caller
 // places its address in the appropriate location: either in a register or on
 // the stack, according to its position in the argument list. (..)"
-fn classify_ret_ty<Ty>(ret: &mut ArgType<Ty>) {
+fn classify_ret_ty<Ty>(ret: &mut ArgType<'_, Ty>) {
  if ret.layout.is_aggregate() && ret.layout.size.bits() > 32 {
  ret.make_indirect();
  } else {
  ret.extend_integer_width_to(16);
  }
 }
 
-fn classify_arg_ty<Ty>(arg: &mut ArgType<Ty>) {
+fn classify_arg_ty<Ty>(arg: &mut ArgType<'_, Ty>) {
  if arg.layout.is_aggregate() && arg.layout.size.bits() > 32 {
  arg.make_indirect();
  } else {
  arg.extend_integer_width_to(16);
  }
 }
 
-pub fn compute_abi_info<Ty>(fty: &mut FnType<Ty>) {
+pub fn compute_abi_info<Ty>(fty: &mut FnType<'_, Ty>) {
  if !fty.ret.is_ignore() {
  classify_ret_ty(&mut fty.ret);
  }

src/librustc_target/abi/call/nvptx.rs

@@ -1,25 +1,25 @@
 // Reference: PTX Writer's Guide to Interoperability
 // http://docs.nvidia.com/cuda/ptx-writers-guide-to-interoperability
 
-use abi::call::{ArgType, FnType};
+use crate::abi::call::{ArgType, FnType};
 
-fn classify_ret_ty<Ty>(ret: &mut ArgType<Ty>) {
+fn classify_ret_ty<Ty>(ret: &mut ArgType<'_, Ty>) {
  if ret.layout.is_aggregate() && ret.layout.size.bits() > 32 {
  ret.make_indirect();
  } else {
  ret.extend_integer_width_to(32);
  }
 }
 
-fn classify_arg_ty<Ty>(arg: &mut ArgType<Ty>) {
+fn classify_arg_ty<Ty>(arg: &mut ArgType<'_, Ty>) {
  if arg.layout.is_aggregate() && arg.layout.size.bits() > 32 {
  arg.make_indirect();
  } else {
  arg.extend_integer_width_to(32);
  }
 }
 
-pub fn compute_abi_info<Ty>(fty: &mut FnType<Ty>) {
+pub fn compute_abi_info<Ty>(fty: &mut FnType<'_, Ty>) {
  if !fty.ret.is_ignore() {
  classify_ret_ty(&mut fty.ret);
  }

src/librustc_target/abi/call/nvptx64.rs

@@ -1,25 +1,25 @@
 // Reference: PTX Writer's Guide to Interoperability
 // http://docs.nvidia.com/cuda/ptx-writers-guide-to-interoperability
 
-use abi::call::{ArgType, FnType};
+use crate::abi::call::{ArgType, FnType};
 
-fn classify_ret_ty<Ty>(ret: &mut ArgType<Ty>) {
+fn classify_ret_ty<Ty>(ret: &mut ArgType<'_, Ty>) {
  if ret.layout.is_aggregate() && ret.layout.size.bits() > 64 {
  ret.make_indirect();
  } else {
  ret.extend_integer_width_to(64);
  }
 }
 
-fn classify_arg_ty<Ty>(arg: &mut ArgType<Ty>) {
+fn classify_arg_ty<Ty>(arg: &mut ArgType<'_, Ty>) {
  if arg.layout.is_aggregate() && arg.layout.size.bits() > 64 {
  arg.make_indirect();
  } else {
  arg.extend_integer_width_to(64);
  }
 }
 
-pub fn compute_abi_info<Ty>(fty: &mut FnType<Ty>) {
+pub fn compute_abi_info<Ty>(fty: &mut FnType<'_, Ty>) {
  if !fty.ret.is_ignore() {
  classify_ret_ty(&mut fty.ret);
  }

src/librustc_target/abi/call/powerpc.rs

@@ -1,7 +1,7 @@
-use abi::call::{ArgType, FnType, Reg, Uniform};
-use abi::{HasDataLayout, LayoutOf, Size, TyLayoutMethods};
+use crate::abi::call::{ArgType, FnType, Reg, Uniform};
+use crate::abi::{HasDataLayout, LayoutOf, Size, TyLayoutMethods};
 
-fn classify_ret_ty<'a, Ty, C>(cx: &C, ret: &mut ArgType<Ty>, offset: &mut Size)
+fn classify_ret_ty<'a, Ty, C>(cx: &C, ret: &mut ArgType<'_, Ty>, offset: &mut Size)
  where Ty: TyLayoutMethods<'a, C>, C: LayoutOf<Ty = Ty> + HasDataLayout
 {
  if !ret.layout.is_aggregate() {
@@ -12,7 +12,7 @@ fn classify_ret_ty<'a, Ty, C>(cx: &C, ret: &mut ArgType<Ty>, offset: &mut Size)
  }
 }
 
-fn classify_arg_ty<'a, Ty, C>(cx: &C, arg: &mut ArgType<Ty>, offset: &mut Size)
+fn classify_arg_ty<'a, Ty, C>(cx: &C, arg: &mut ArgType<'_, Ty>, offset: &mut Size)
  where Ty: TyLayoutMethods<'a, C>, C: LayoutOf<Ty = Ty> + HasDataLayout
 {
  let dl = cx.data_layout();
@@ -34,7 +34,7 @@ fn classify_arg_ty<'a, Ty, C>(cx: &C, arg: &mut ArgType<Ty>, offset: &mut Size)
  *offset = offset.align_to(align) + size.align_to(align);
 }
 
-pub fn compute_abi_info<'a, Ty, C>(cx: &C, fty: &mut FnType<Ty>)
+pub fn compute_abi_info<'a, Ty, C>(cx: &C, fty: &mut FnType<'_, Ty>)
  where Ty: TyLayoutMethods<'a, C>, C: LayoutOf<Ty = Ty> + HasDataLayout
 {
  let mut offset = Size::ZERO;

src/librustc_target/abi/call/powerpc64.rs

@@ -2,16 +2,16 @@
 // Alignment of 128 bit types is not currently handled, this will
 // need to be fixed when PowerPC vector support is added.
 
-use abi::call::{FnType, ArgType, Reg, RegKind, Uniform};
-use abi::{Endian, HasDataLayout, LayoutOf, TyLayout, TyLayoutMethods};
-use spec::HasTargetSpec;
+use crate::abi::call::{FnType, ArgType, Reg, RegKind, Uniform};
+use crate::abi::{Endian, HasDataLayout, LayoutOf, TyLayout, TyLayoutMethods};
+use crate::spec::HasTargetSpec;
 
 #[derive(Debug, Clone, Copy, PartialEq)]
 enum ABI {
  ELFv1, // original ABI used for powerpc64 (big-endian)
  ELFv2, // newer ABI used for powerpc64le and musl (both endians)
 }
-use self::ABI::*;
+use ABI::*;
 
 fn is_homogeneous_aggregate<'a, Ty, C>(cx: &C, arg: &mut ArgType<'a, Ty>, abi: ABI)
  -> Option<Uniform>

src/librustc_target/abi/call/riscv.rs

@@ -1,9 +1,9 @@
 // Reference: RISC-V ELF psABI specification
 // https://github.com/riscv/riscv-elf-psabi-doc
 
-use abi::call::{ArgType, FnType};
+use crate::abi::call::{ArgType, FnType};
 
-fn classify_ret_ty<Ty>(arg: &mut ArgType<Ty>, xlen: u64) {
+fn classify_ret_ty<Ty>(arg: &mut ArgType<'_, Ty>, xlen: u64) {
  // "Scalars wider than 2✕XLEN are passed by reference and are replaced in
  // the argument list with the address."
  // "Aggregates larger than 2✕XLEN bits are passed by reference and are
@@ -19,7 +19,7 @@ fn classify_ret_ty<Ty>(arg: &mut ArgType<Ty>, xlen: u64) {
  arg.extend_integer_width_to(xlen); // this method only affects integer scalars
 }
 
-fn classify_arg_ty<Ty>(arg: &mut ArgType<Ty>, xlen: u64) {
+fn classify_arg_ty<Ty>(arg: &mut ArgType<'_, Ty>, xlen: u64) {
  // "Scalars wider than 2✕XLEN are passed by reference and are replaced in
  // the argument list with the address."
  // "Aggregates larger than 2✕XLEN bits are passed by reference and are
@@ -35,7 +35,7 @@ fn classify_arg_ty<Ty>(arg: &mut ArgType<Ty>, xlen: u64) {
  arg.extend_integer_width_to(xlen); // this method only affects integer scalars
 }
 
-pub fn compute_abi_info<Ty>(fty: &mut FnType<Ty>, xlen: u64) {
+pub fn compute_abi_info<Ty>(fty: &mut FnType<'_, Ty>, xlen: u64) {
  if !fty.ret.is_ignore() {
  classify_ret_ty(&mut fty.ret, xlen);
  }

src/librustc_target/abi/call/s390x.rs

@@ -1,10 +1,10 @@
 // FIXME: The assumes we're using the non-vector ABI, i.e., compiling
 // for a pre-z13 machine or using -mno-vx.
 
-use abi::call::{FnType, ArgType, Reg};
-use abi::{self, HasDataLayout, LayoutOf, TyLayout, TyLayoutMethods};
+use crate::abi::call::{FnType, ArgType, Reg};
+use crate::abi::{self, HasDataLayout, LayoutOf, TyLayout, TyLayoutMethods};
 
-fn classify_ret_ty<'a, Ty, C>(ret: &mut ArgType<Ty>)
+fn classify_ret_ty<'a, Ty, C>(ret: &mut ArgType<'_, Ty>)
  where Ty: TyLayoutMethods<'a, C>, C: LayoutOf<Ty = Ty> + HasDataLayout
 {
  if !ret.layout.is_aggregate() && ret.layout.size.bits() <= 64 {

src/librustc_target/abi/call/sparc.rs

@@ -1,7 +1,7 @@
-use abi::call::{ArgType, FnType, Reg, Uniform};
-use abi::{HasDataLayout, LayoutOf, Size, TyLayoutMethods};
+use crate::abi::call::{ArgType, FnType, Reg, Uniform};
+use crate::abi::{HasDataLayout, LayoutOf, Size, TyLayoutMethods};
 
-fn classify_ret_ty<'a, Ty, C>(cx: &C, ret: &mut ArgType<Ty>, offset: &mut Size)
+fn classify_ret_ty<'a, Ty, C>(cx: &C, ret: &mut ArgType<'_, Ty>, offset: &mut Size)
  where Ty: TyLayoutMethods<'a, C>, C: LayoutOf<Ty = Ty> + HasDataLayout
 {
  if !ret.layout.is_aggregate() {
@@ -12,7 +12,7 @@ fn classify_ret_ty<'a, Ty, C>(cx: &C, ret: &mut ArgType<Ty>, offset: &mut Size)
  }
 }
 
-fn classify_arg_ty<'a, Ty, C>(cx: &C, arg: &mut ArgType<Ty>, offset: &mut Size)
+fn classify_arg_ty<'a, Ty, C>(cx: &C, arg: &mut ArgType<'_, Ty>, offset: &mut Size)
  where Ty: TyLayoutMethods<'a, C>, C: LayoutOf<Ty = Ty> + HasDataLayout
 {
  let dl = cx.data_layout();
@@ -34,7 +34,7 @@ fn classify_arg_ty<'a, Ty, C>(cx: &C, arg: &mut ArgType<Ty>, offset: &mut Size)
  *offset = offset.align_to(align) + size.align_to(align);
 }
 
-pub fn compute_abi_info<'a, Ty, C>(cx: &C, fty: &mut FnType<Ty>)
+pub fn compute_abi_info<'a, Ty, C>(cx: &C, fty: &mut FnType<'_, Ty>)
  where Ty: TyLayoutMethods<'a, C>, C: LayoutOf<Ty = Ty> + HasDataLayout
 {
  let mut offset = Size::ZERO;