RP2040: Fix I2C lockups and improve error handling

Problem:

* in edge-case scenarios the tx empty interrupt was still enabled after a
  transmission was finished. This would lead to endless interrupt tail
  chaining that completely starved the system.

Solution:

* all irqs are now disabled at the end of a transaction by default

Error handling:

* all error condition irqs like over and underruns of tx and rx fifos
  are now enabled and handled with an wake-up of the sleeping thread
  plus disabling of all irqs

Optimizations:

* irq status register is only read once for evalutation in the irq
  handler
* better Utilization of the rx fifos during reception, which are now read
  as long as there is data left for the transaction