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Some pages might be remap or swap out. Thus, revalidation of the
chaining block is necessary.
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@ChinYikMing
ChinYikMing committed Nov 30, 2024
1 parent 5d7049d commit 6b08e38
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Showing 5 changed files with 189 additions and 154 deletions.
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59 changes: 40 additions & 19 deletions src/emulate.c
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Original file line number Diff line number Diff line change
Expand Up @@ -45,7 +45,6 @@ extern struct target_ops gdbstub_ops;
static uint32_t reloc_enable_mmu_jalr_addr;
static bool reloc_enable_mmu = false;
bool need_retranslate = false;
bool need_refetch = false;
#endif

static void rv_trap_default_handler(riscv_t *rv)
Expand Down Expand Up @@ -380,12 +379,43 @@ extern void emu_update_uart_interrupts(riscv_t *rv);
static uint32_t peripheral_update_ctr = 64;
#endif

bool use_chain = false;
struct rv_insn *tgt;

/* Interpreter-based execution path */
#define RVOP(inst, code, asm) \
static bool do_##inst(riscv_t *rv, rv_insn_t *ir, uint64_t cycle, \
uint32_t PC) \
{ \
cycle++; \
if (use_chain) { \
rv_insn_t *n = ir; \
rv_insn_t *test_ir = mpool_calloc(rv->block_ir_mp); \
uint32_t test_pc = PC; \
while (n) { \
uint32_t insn_len; \
uint32_t insn = rv->io.mem_ifetch(rv, test_pc); \
assert(insn); \
/* decode the instruction */ \
if (!rv_decode(test_ir, insn)) { \
exit(1); \
} \
insn_len = is_compressed(insn) ? 2 : 4; \
if (tgt->opcode != test_ir->opcode) { \
block_map_clear(rv); \
rv->csr_cycle = cycle; \
rv->PC = PC; \
return false; \
} \
n = n->next; \
tgt = n; \
test_pc += insn_len; \
} \
/*assert(tgt->opcode == test_ir->opcode);\*/ \
use_chain = false; \
} else { \
/*printf("use chain OK!\n");\*/ \
} \
code; \
nextop: \
PC += __rv_insn_##inst##_len; \
Expand Down Expand Up @@ -603,14 +633,6 @@ static void block_translate(riscv_t *rv, block_t *block)
need_retranslate = false;
goto retranslate;
}

if (!insn && need_refetch) {
memset(block, 0, sizeof(block_t));
need_refetch = false;
block_map_clear(rv);
use_orig_pc = true;
goto retranslate;
}
#endif

assert(insn);
Expand Down Expand Up @@ -645,10 +667,10 @@ static void block_translate(riscv_t *rv, block_t *block)
break;
}

//???
//if(IF_insn(ir, add)){
// break;
//}
//???
// if(IF_insn(ir, add)){
// break;
//}

ir = mpool_calloc(rv->block_ir_mp);
}
Expand Down Expand Up @@ -856,16 +878,16 @@ static block_t *block_find_or_translate(riscv_t *rv)
orig_pc = rv->PC;
block_translate(rv, next);

//optimize_constant(rv, next);
// optimize_constant(rv, next);
#if RV32_HAS(GDBSTUB)
if (likely(!rv->debug_mode))
#endif
/* macro operation fusion */
//match_pattern(rv, next);
/* macro operation fusion */
// match_pattern(rv, next);

#if !RV32_HAS(JIT)
/* insert the block into block map */
block_insert(&rv->block_map, next);
/* insert the block into block map */
block_insert(&rv->block_map, next);
#else
/* insert the block into block cache */
block_t *delete_target = cache_put(rv->block_cache, rv->PC, &(*next));
Expand Down Expand Up @@ -1033,7 +1055,6 @@ void rv_step(void *arg)
* the previous block.
*/

//prev = NULL;
if (prev) {
rv_insn_t *last_ir = prev->ir_tail;
/* chain block */
Expand Down
2 changes: 1 addition & 1 deletion src/riscv.c
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Original file line number Diff line number Diff line change
Expand Up @@ -396,7 +396,7 @@ riscv_t *rv_create(riscv_user_t rv_attr)
attr->uart->in_fd = 0;
attr->uart->out_fd = 1;

//capture_keyboard_input();
// capture_keyboard_input();
#endif /* !RV32_HAS(SYSTEM) || (RV32_HAS(SYSTEM) && RV32_HAS(ELF_LOADER)) */

/* default standard stream.
Expand Down
83 changes: 64 additions & 19 deletions src/rv32_template.c
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Original file line number Diff line number Diff line change
Expand Up @@ -177,8 +177,12 @@ RVOP(
#if RV32_HAS(SYSTEM)
if (!rv->is_trapped)
#endif
{
tgt = taken;
use_chain = true;
MUST_TAIL
return taken->impl(rv, taken, cycle, PC);
}
}
goto end_op;
},
Expand Down Expand Up @@ -211,9 +215,7 @@ RVOP(
* In addition, before relocate_enable_mmu, the block maybe retranslated, \
* thus the branch history lookup table should not be updated too. \
*/ \
IIF(RV32_HAS(SYSTEM)(if (!rv->is_trapped && !reloc_enable_mmu), )) \
{ \
}
IIF(RV32_HAS(SYSTEM)(if (!rv->is_trapped && !reloc_enable_mmu), )) {}
#else
#define LOOKUP_OR_UPDATE_BRANCH_HISTORY_TABLE() \
block_t *block = cache_get(rv->block_cache, PC, true); \
Expand Down Expand Up @@ -313,16 +315,59 @@ RVOP(
(type) x cond (type) y
/* clang-format on */

#define BRANCH_FUNC(type, cond) \
IIF(RV32_HAS(EXT_C))(, const uint32_t pc = PC;); \
if (BRANCH_COND(type, rv->X[ir->rs1], rv->X[ir->rs2], cond)) { \
is_branch_taken = false; \
PC += 4; \
goto end_op; \
} \
is_branch_taken = true; \
PC += ir->imm; \
/* check instruction misaligned */ \
#define BRANCH_FUNC(type, cond) \
IIF(RV32_HAS(EXT_C))(, const uint32_t pc = PC;); \
if (BRANCH_COND(type, rv->X[ir->rs1], rv->X[ir->rs2], cond)) { \
is_branch_taken = false; \
struct rv_insn *untaken = ir->branch_untaken; \
if (!untaken) \
goto nextop; \
IIF(RV32_HAS(JIT)) \
( \
{ \
cache_get(rv->block_cache, PC + 4, true); \
if (!set_add(&pc_set, PC + 4)) \
has_loops = true; \
if (cache_hot(rv->block_cache, PC + 4)) \
goto nextop; \
}, ); \
PC += 4; \
if (!rv->is_trapped) { \
tgt = untaken; \
use_chain = true; \
last_pc = PC; \
int level; \
pte_t *pte_ref; \
MUST_TAIL return untaken->impl(rv, untaken, cycle, PC); \
} else { \
goto end_op; \
} \
} \
is_branch_taken = true; \
PC += ir->imm; \
/* check instruction misaligned */ \
IIF(RV32_HAS(EXT_C)) \
(, RV_EXC_MISALIGN_HANDLER(pc, INSN, false, 0);); \
struct rv_insn *taken = ir->branch_taken; \
if (taken) { \
IIF(RV32_HAS(JIT)) \
( \
{ \
cache_get(rv->block_cache, PC, true); \
if (!set_add(&pc_set, PC)) \
has_loops = true; \
if (cache_hot(rv->block_cache, PC)) \
goto end_op; \
}, ); \
if (!rv->is_trapped) { \
tgt = taken; \
use_chain = true; \
last_pc = PC; \
int level; \
pte_t *pte_ref; \
MUST_TAIL return taken->impl(rv, taken, cycle, PC); \
} \
} \
goto end_op;

/* In RV32I and RV64I, if the branch is taken, set pc = pc + offset, where
Expand Down Expand Up @@ -370,12 +415,12 @@ RVOP(
RVOP(
bne,
{
if(rv->X[ir->rs1] != rv->X[ir->rs2]){
PC += ir->imm;
} else {
PC += 4;
}
goto end_op;
if (rv->X[ir->rs1] != rv->X[ir->rs2]) {
PC += ir->imm;
} else {
PC += 4;
}
goto end_op;
},
GEN({
rald2, rs1, rs2;
Expand Down
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