Bring up Linux kernel v6.6.59

Need to deal with check_unaligned_access and __riscv_copy_words_unaligned. They seem like a testing of CPU misalignment handling and do not trap into misalignment syscall handler and return via sret. Thus, simply PC + 4 to make CPU progress. Also, the Linux kernel requires FENCE SBI extension to SMP. The current SBI implementation lacks of FENCE SBI extension, so adding one. Otherwise, warning message during booting will come up, e.g., 'remote fence extension is not available in SBI v0.3'.
ChinYikMing · Nov 5, 2024 · a281c19 · a281c19
1 parent e2bb7f0
commit a281c19
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Showing 4 changed files with 31 additions and 4 deletions.
diff --git a/Image b/Image
diff --git a/src/emulate.c b/src/emulate.c
@@ -70,9 +70,7 @@ static void __trap_handler(riscv_t *rv);
     {                                                                 \
         rv->compressed = compress;                                    \
         rv->csr_cycle = cycle;                                        \
-        rv->PC = PC;                                                  \
-        SET_CAUSE_AND_TVAL_THEN_TRAP(rv, type##_MISALIGNED,           \
-                                     IIF(IO)(addr, mask_or_pc));      \
+        rv->PC = PC + 4;                                              \
         return false;                                                 \
     }
 
@@ -1110,6 +1108,7 @@ static void __trap_handler(riscv_t *rv)
         ir->impl = dispatch_table[ir->opcode];
         rv->compressed = is_compressed(insn);
         ir->impl(rv, ir, rv->csr_cycle, rv->PC);
+
     }
 }
 #endif /* RV32_HAS(SYSTEM) */

diff --git a/src/riscv.h b/src/riscv.h
@@ -218,6 +218,11 @@ enum SV32_PTE_PERM {
 #define SBI_EID_RST 0x53525354
 #define SBI_RST_SYSTEM_RESET 0
 
+/* Allows the supervisor to request flushing TLB on remote core */
+#define SBI_EID_RFENCE 0x52464E43
+#define SBI_REMOTE_FENCEI 0
+#define SBI_REMOTE_SFENCEVMA 1
+
 #define RV_MVENDORID 0x12345678
 #define RV_MARCHID ((1ULL << 31) | 1)
 #define RV_MIMPID 1

diff --git a/src/syscall.c b/src/syscall.c
@@ -38,6 +38,7 @@
         _(sbi_base,         0x10)          \
         _(sbi_timer,        0x54494D45)    \
         _(sbi_rst,          0x53525354)    \
+        _(sbi_rfence,       0x52464E43)    \
     )                                      \
     IIF(RV32_HAS(SDL))(                    \
         _(draw_frame,       0xBEEF)        \
@@ -431,7 +432,7 @@ static void syscall_sbi_base(riscv_t *rv)
     case SBI_BASE_PROBE_EXTENSION: {
         const riscv_word_t eid = rv_get_reg(rv, rv_reg_a0);
         bool available =
-            eid == SBI_EID_BASE || eid == SBI_EID_TIMER || eid == SBI_EID_RST;
+            eid == SBI_EID_BASE || eid == SBI_EID_TIMER || eid == SBI_EID_RST || eid == SBI_EID_RFENCE;
         rv_set_reg(rv, rv_reg_a0, SBI_SUCCESS);
         rv_set_reg(rv, rv_reg_a1, available);
         break;
@@ -462,6 +463,28 @@ static void syscall_sbi_rst(riscv_t *rv)
         break;
     }
 }
+
+static void syscall_sbi_rfence(riscv_t *rv)
+{
+    const riscv_word_t fid = rv_get_reg(rv, rv_reg_a6);
+    const riscv_word_t a0 = rv_get_reg(rv, rv_reg_a0);
+    const riscv_word_t a1 = rv_get_reg(rv, rv_reg_a1);
+
+    switch (fid) {
+    case SBI_REMOTE_FENCEI:
+        rv_set_reg(rv, rv_reg_a0, SBI_SUCCESS);
+        rv_set_reg(rv, rv_reg_a1, 0);
+        break;
+    case SBI_REMOTE_SFENCEVMA:
+        rv_set_reg(rv, rv_reg_a0, SBI_SUCCESS);
+        rv_set_reg(rv, rv_reg_a1, 0);
+        break;
+    default:
+        rv_set_reg(rv, rv_reg_a0, SBI_ERR_NOT_SUPPORTED);
+        rv_set_reg(rv, rv_reg_a1, 0);
+        break;
+    }
+}
 #endif /* SYSTEM */
 
 void syscall_handler(riscv_t *rv)