move common sim infra to chipflow-lib

.github/workflows/test-examples.yml

@@ -36,19 +36,34 @@ jobs:
           path: ${{ env.test_repo_path }}
 
       - name: Check for branch ${{ github.head_ref }}
+        id: check-head-ref
         working-directory: ${{ env.test_repo_path }}
         if: github.event_name == 'pull_request'
         run: |
           git remote update
-          git checkout ${{ github.head_ref }} || echo "${{github.head_ref}} not found, checking base ${{github.base_ref}}"
+          git checkout ${{ github.head_ref }}
+          if [ $? -eq 0 ]; then
+             echo "Using branch ${{github.head_ref}}"
+             echo "found-branch=1\n" >> $GITHUB_OUTPUT
+          else
+             echo "${{github.head_ref}} not found, checking base ${{github.base_ref}}"
+             echo "found-branch=0\n" >> $GITHUB_OUTPUT
+          fi
 
       - name: Check for branch ${{ github.base_ref }}
-        working-directory: ${{ env.test_repo_path }}
-        if: github.event_name == 'pull_request'
+        id: check-base-ref
+        working-directory: ${{ env.test_repo_path }}x
+        if: github.event_name == 'pull_request' && steps.check-head-ref == 0
         run: |
           git remote update
-          git checkout ${{ github.base_ref }} || echo "${{github.base_ref}} not found Falling back to main"
-
+          git checkout ${{ github.base_ref }}
+          if [ $? -eq 0 ]; then
+             echo "Using branch ${{github.base_ref}}"
+             echo "found-branch=1\n" >> $GITHUB_OUTPUT
+          else
+          || echo "${{github.base_ref}} not found Falling back to main"
+             echo "found-branch=0\n" >> $GITHUB_OUTPUT
+          fi
 
       - name: Set up PDM
         uses: pdm-project/setup-pdm@v4
@@ -67,10 +82,15 @@ jobs:
         run: |
           pdm test
 
-      - name: Submit build ${{ env.is_dry }}
+      - name: Run simulation check
         working-directory: ${{ env.test_repo_path }}/${{ matrix.repo.design }}
         run: |
           pdm run chipflow pin lock
+          pdm sim-check
+
+      - name: Submit build ${{ env.is_dry }}
+        working-directory: ${{ env.test_repo_path }}/${{ matrix.repo.design }}
+        run: |
           pdm run chipflow silicon submit --wait $DRY | cat
         env:
           CHIPFLOW_API_KEY: ${{ secrets.CHIPFLOW_API_KEY}}

chipflow_lib/__init__.py

@@ -44,7 +44,7 @@ def _ensure_chipflow_root():
 
     if os.environ["CHIPFLOW_ROOT"] not in sys.path:
         sys.path.append(os.environ["CHIPFLOW_ROOT"])
-    _ensure_chipflow_root.root = os.environ["CHIPFLOW_ROOT"]
+    _ensure_chipflow_root.root = Path(os.environ["CHIPFLOW_ROOT"]).absolute()
     return _ensure_chipflow_root.root
 
 

chipflow_lib/cli.py

@@ -20,13 +20,21 @@ class UnexpectedError(ChipFlowError):
 
 log_level = logging.WARNING
 
+
+DEFAULT_STEPS = {
+    "silicon": "chipflow_lib.steps.silicon:SiliconStep",
+    "sim": "chipflow_lib.steps.sim:SimStep",
+}
+
+
 def run(argv=sys.argv[1:]):
     config = _parse_config()
 
     commands = {}
     commands["pin"] = PinCommand(config)
 
-    for step_name, step_reference in config["chipflow"]["steps"].items():
+    steps = DEFAULT_STEPS | config["chipflow"]["steps"]
+    for step_name, step_reference in steps.items():
         step_cls = _get_cls_by_reference(step_reference, context=f"step `{step_name}`")
         try:
             commands[step_name] = step_cls(config)