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Goal is to have a single BootROM for all CEP builds... FPGA, Cosim ASIC, CoSIM not-ASIC
While the FPGA bootrom is using the same sd.c code as the CEP Cosim bootrom, direct usage does not work.
Probably an issue with the linker scripts.... and the FPGA having much bigger memory. Need to investigate further.
The text was updated successfully, but these errors were encountered:
bchetwynd
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Goal is to have a single BootROM for all CEP builds... FPGA, Cosim ASIC, CoSIM not-ASIC
While the FPGA bootrom is using the same sd.c code as the CEP Cosim bootrom, direct usage does not work.
Probably an issue with the linker scripts.... and the FPGA having much bigger memory. Need to investigate further.
The text was updated successfully, but these errors were encountered: