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26 Open 17 Closed
26 Open 17 Closed
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Issues list

Testing TileLink blackBox interface failing in simulations
#43 opened Feb 4, 2025 by EdrisBorne
Errors in compile with CEP 4.7
#42 opened Oct 28, 2024 by jordankrim
7
Verilator bareMetal test VCD is incomplete in CEP v4.5 and v4.7
#41 opened Sep 23, 2024 by jordankrim
2
How to produce a VCD file when running Verilator with CEP 4.5
#39 opened Sep 13, 2024 by jordankrim
2
Attempting to run the Baremetal tests with CEP (v4.7) using Xcelium (23.09.006) fails
#38 opened Aug 16, 2024 by jordankrim
2
Attempting to compile the CEP (v4.7) with Verilator 5.022 fails
#37 opened Aug 15, 2024 by jordankrim
7
Compiling the Chipyard fails
#36 opened Jul 2, 2024 by jordankrim
3
Running Baremetal tests with Verilator 5.008 and CEP 4.5 fails
#35 opened May 28, 2024 by jordankrim
@bchetwynd
4
Finishing debugging optional inclusion of the LLKI
#34 opened May 23, 2024 by bchetwynd
@bchetwynd
Status of bareMetal test macroMix on v4.5 and v4.6
#33 opened May 10, 2024 by jordankrim
2
CHIPYARD: SD Interface on VCU118 times out
#32 opened May 9, 2024 by bchetwynd
@bchetwynd
CEP COSIM: All ISA tests fail when built on Ubuntu 22.04, running with QuestaSim 2023.4 (but pass on RHEL8)
#31 opened May 9, 2024 by bchetwynd
@bchetwynd
CEP ASIC: Update CEP ASIC build to be compatible with latest CEP release
#30 opened May 8, 2024 by bchetwynd
@bchetwynd
bfmTests/macroMix and bfm/srotErrorTest fail with xcelium
#29 opened May 7, 2024 by bchetwynd
@bchetwynd
COSIM: xcellium runs w/o proper timestamps enhancement New feature or request
#22 opened Jul 26, 2023 by bchetwynd
@bchetwynd
bareMetal/regTest fails on two consecutive writes to SROT scratchpad registers only when L2 cache is present
#21 opened Jul 25, 2023 by bchetwynd
@bchetwynd
Restore co-simulation dtmTest enhancement New feature or request
#14 opened Dec 7, 2022 by bchetwynd
@bchetwynd
1
auto-fir perl script does not run in Ubuntu 18.04 bug Something isn't working
#12 opened Dec 1, 2022 by bchetwynd
@bchetwynd
1
COSIM: bare_malloc does not work as expected bug Something isn't working
#11 opened Dec 1, 2022 by bchetwynd
@bchetwynd
COSIM: Restore legacy tests enhancement New feature or request
#9 opened Dec 1, 2022 by bchetwynd
@bchetwynd
Quest for the Unified Bootrom enhancement New feature or request
#8 opened Dec 1, 2022 by bchetwynd
@bchetwynd
COSIM: Virtual Mode ISA Tests now failing after Chipyard bump to v1.7.0 bug Something isn't working
#6 opened Dec 1, 2022 by bchetwynd
@bchetwynd
3
OPENTITAN: Up-rev opentitan version enhancement New feature or request
#5 opened Dec 1, 2022 by bchetwynd
@bchetwynd
1
VERILATOR: Baremetal tests on Verilator are only single-core enhancement New feature or request
#3 opened Dec 1, 2022 by bchetwynd
@bchetwynd
VERILATOR: Update Verilator-based simulation to leverage FAST Memory Loading enhancement New feature or request
#2 opened Dec 1, 2022 by bchetwynd
@bchetwynd
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