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An ALU designed and written for a Digital Logic class

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SimpleALU

Description

An ALU designed and written for a Digital Logic class

Prerequisites

Verilog Usage

Please consult and use Makefile for building program

-make build compiles all verilog in /src into a single binary in /bin
-make run runs the binary
-make clean cleans the /bin directory

Design

All operations in the ALU could be broken down into three operation types. Refer to /doc/ModesOfOperationAndOpcodes.txt

State Machine

Multiplexers were ideal for organizing operations. One was used for each operation type and one final one was used to select the operation type multiplexer output.

Circuit Diagram

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An ALU designed and written for a Digital Logic class

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