Skip to content

Commit

Permalink
src/ibm/power9/homer.c: re-organize istep 21.1
Browse files Browse the repository at this point in the history
Loop over CPUs on each step except for those which target master OCC
only.

Change-Id: I3b9f7f09cffa2de5372b9d07c45d47cfd16bebc9
Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
  • Loading branch information
SergiiDmytruk committed Feb 19, 2022
1 parent 0c52b8a commit 16e4179
Showing 1 changed file with 32 additions and 23 deletions.
55 changes: 32 additions & 23 deletions src/soc/ibm/power9/homer.c
Original file line number Diff line number Diff line change
Expand Up @@ -2482,45 +2482,55 @@ static void set_occ_active_state(uint8_t chip, struct homer_st *homer)
}

/* Moves OCC to active state */
static void activate_occ(uint8_t chip, struct homer_st *homer)
static void activate_occ(uint8_t chips, struct homer_st *homers)
{
/* TODO: Hostboot performs each step below for every OCC before moving
* to the next step (looks like performing it for master OCC
* first), so might need to loop over every OCC in inside each
* function below. All this after starting PM complex for every
* chip outside of this function. */

struct occ_poll_response poll_response;

/* Make sure OCCs are ready for communication */
wait_for_occ_checkpoint(chip);
for (uint8_t chip = 0; chip < MAX_CHIPS; chip++) {
if (chips & (1 << chip))
wait_for_occ_checkpoint(chip);
}

/* Send initial poll to all OCCs to establish communication */
poll_occ(chip, homer, /*flush_all_errors=*/false, &poll_response);
for (uint8_t chip = 0; chip < MAX_CHIPS; chip++) {
if (chips & (1 << chip)) {
struct occ_poll_response poll_response;
poll_occ(chip, &homers[chip], /*flush_all_errors=*/false,
&poll_response);
}
}

/* Send OCC's config data */
send_occ_config_data(chip, homer);
for (uint8_t chip = 0; chip < MAX_CHIPS; chip++) {
if (chips & (1 << chip))
send_occ_config_data(chip, &homers[chip]);
}

/* Set the User PCAP */
send_occ_user_power_cap(chip, homer);
/* Set the User PCAP (sent only to master OCC) */
send_occ_user_power_cap(/*chip=*/0, &homers[0]);

/* Switch for OCC to active state */
set_occ_active_state(chip, homer);
/* Switch for OCC to active state (sent only to master OCC) */
set_occ_active_state(/*chip=*/0, &homers[0]);

/* Hostboot sets active sensors for all OCCs here, so BMC can start
/* TODO: Hostboot sets active sensors for all OCCs here, so BMC can start
* communication with OCCs. */
}

static void istep_21_1(uint8_t chip, struct homer_st *homer, uint64_t cores)
static void istep_21_1(uint8_t chips, struct homer_st *homers, const uint64_t *cores)
{
load_pm_complex(chip, homer);
for (uint8_t chip = 0; chip < MAX_CHIPS; chip++) {
if (chips & (1 << chip))
load_pm_complex(chip, &homers[chip]);
}

printk(BIOS_ERR, "Starting PM complex...\n");
start_pm_complex(chip, homer, cores);
for (uint8_t chip = 0; chip < MAX_CHIPS; chip++) {
if (chips & (1 << chip))
start_pm_complex(chip, &homers[chip], cores[chip]);
}
printk(BIOS_ERR, "Done starting PM complex\n");

printk(BIOS_ERR, "Activating OCC...\n");
activate_occ(chip, homer);
activate_occ(chips, homers);
printk(BIOS_ERR, "Done activating OCC\n");
}

Expand Down Expand Up @@ -3590,8 +3600,7 @@ void build_homer_image(void *homer_bar, uint64_t nominal_freq[])
}

/* Boot OCC here and activate SGPE at the same time */
/* TODO: initialize OCC for the second CPU when it's present */
istep_21_1(/*chip=*/0, homer, cores[0]);
istep_21_1(chips, homer, cores);

istep_16_1(this_core);
}

0 comments on commit 16e4179

Please sign in to comment.