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Switch away from FIT payload #106

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SergiiDmytruk
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This makes skiboot an ELF payload.

Two DTB files are prepared for two configurations and included into CBFS during build. In sources 2-CPU version incudes 1-CPU file, so it should be easy to maintain. Can switch to DT overlays for greater flexibility and saving some space, code supports them and dtc probably does too.

@SergiiDmytruk SergiiDmytruk force-pushed the raptor-cs_talos-2/dt_with_2nd_cpu branch 2 times, most recently from 6cab1de to d6010ce Compare March 21, 2022 21:58
@krystian-hebel krystian-hebel changed the base branch from raptor-cs_talos-2/dt_with_2nd_cpu to raptor-cs_talos-2/develop April 7, 2022 12:59
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  1. Rebase please
  2. Memory range containing CBMEM is not reserved, probably applies to all ranges normally reserved by coreboot
  3. No /firmware/coreboot node in device tree (required by cbmem util)

Build it as ELF instead.

Change-Id: I2d2e98fdd2f5be38438a2992c1f7d145384e2e12
Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
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@krystian-hebel Copied two functions from src/lib/fit.c. Is it worth moving them to a separate conditionally-compiled source file and enable it for SUPPORT_FIT_PAYLOAD and POWER9? Or maybe there is another way of doing this.

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This confirms what I wrote on the mailing list about choosing FIT 🙂

I added some comments about stripping unnecessary parts from that code. Memory ranges walk will have to be significantly changed, but "coreboot" node is mostly the same as for FIT. Doesn't make sense to create a separate file just for that, though. Moving it to device_tree.c could help, but I don't know if upstream would be OK with it.

src/soc/ibm/power9/chip.c Outdated Show resolved Hide resolved
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Additionally, ARCH_PPC64 can be now removed from config FIT_PAYLOAD in payloads/Kconfig

EDIT: and PAYLOAD_FIT_SUPPORT, and probably PAYLOAD_SKIBOOT in that file can be removed from list of non-compressable payloads.

src/soc/ibm/power9/chip.c Outdated Show resolved Hide resolved
src/mainboard/raptor-cs/talos-2/Makefile.inc Outdated Show resolved Hide resolved
Change-Id: I447ad54cfabf1753c679e4645b4f8694db1a9dd7
Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
Change-Id: Id1d1bf193c507d11cefbd05461a5fbef958276bd
Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
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Also removed 6 sensors from 2-cpus.dts which were previously removed in 487d707, forgot to return to this after a rebase.

compatible = "ibm,opal-i2c\0ibm,power8-i2c-port\0ibm,power9-i2c-port";
reg = <0x00>;

eeprom@50 {
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@SergiiDmytruk I removed those SPD nodes for CPU0 when I thought that only installed DIMMs have them, but apparently they are always present. Can you add them back, please? You can read them from https://github.com/3mdeb/openpower-coreboot-docs/blob/main/logs/fdt.bin to skip flashing Hostboot and dumping FDT from it.

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Added them back.

src/soc/ibm/power9/chip.c Outdated Show resolved Hide resolved
src/soc/ibm/power9/chip.c Outdated Show resolved Hide resolved
Load and set up FDT ourselves.

Change-Id: Id3380fb706d427ec8bb8083515e11ce93600c6f9
Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
They were removed based on an assumption that only installed DIMMs have
them which turned out to be false.

Change-Id: Ib971e4b40957f2b99fa9c65501082bc7da3cd6e1
Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
@krystian-hebel krystian-hebel merged commit 236fe66 into raptor-cs_talos-2/develop Apr 8, 2022
@krystian-hebel krystian-hebel deleted the raptor-cs_talos-2/elf_payload branch April 8, 2022 19:28
SergiiDmytruk added a commit that referenced this pull request May 4, 2022
* Start with PCI initialization

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Phase 1 of initialization

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Reorganize code a bit

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Enable RI/DI for PCIe

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* First half of Phase2 (PEC init)

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Second half of Phase2 (PHB init)

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Reorganize code into isteps in romstage

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Remove bad check for dying

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Small code improvements

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Fixes for istep 10.10

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Non-functional code improvements

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Use udelay() where appropriate

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Fixes for istep 14.3

* Small changes for consistency.
* Access some registers through a nest chiplet ID.
* Fix a bug in PEC initialization (ATTR_PROC_PCIE_CACHE_INJ_MODE).

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Fix value of MBOX_SCRATCH_REG6_GROUP_PUMP_MODE

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Remove non-breaking spaces in istep_14_3.c

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Invoke istep_10_* earlier in romstage

Change-Id: I229f3b40d1f8b115eaa1d9d9b9e813a43ee807ae
Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
SergiiDmytruk added a commit that referenced this pull request May 5, 2022
* Start with PCI initialization

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Phase 1 of initialization

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Reorganize code a bit

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Enable RI/DI for PCIe

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* First half of Phase2 (PEC init)

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Second half of Phase2 (PHB init)

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Reorganize code into isteps in romstage

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Remove bad check for dying

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Small code improvements

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Fixes for istep 10.10

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Non-functional code improvements

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Use udelay() where appropriate

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Fixes for istep 14.3

* Small changes for consistency.
* Access some registers through a nest chiplet ID.
* Fix a bug in PEC initialization (ATTR_PROC_PCIE_CACHE_INJ_MODE).

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Fix value of MBOX_SCRATCH_REG6_GROUP_PUMP_MODE

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Remove non-breaking spaces in istep_14_3.c

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Invoke istep_10_* earlier in romstage

Change-Id: I229f3b40d1f8b115eaa1d9d9b9e813a43ee807ae
Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
SergiiDmytruk added a commit that referenced this pull request May 5, 2022
* Start with PCI initialization

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Phase 1 of initialization

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Reorganize code a bit

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Enable RI/DI for PCIe

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* First half of Phase2 (PEC init)

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Second half of Phase2 (PHB init)

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Reorganize code into isteps in romstage

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Remove bad check for dying

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Small code improvements

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Fixes for istep 10.10

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Non-functional code improvements

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Use udelay() where appropriate

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Fixes for istep 14.3

* Small changes for consistency.
* Access some registers through a nest chiplet ID.
* Fix a bug in PEC initialization (ATTR_PROC_PCIE_CACHE_INJ_MODE).

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Fix value of MBOX_SCRATCH_REG6_GROUP_PUMP_MODE

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Remove non-breaking spaces in istep_14_3.c

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Invoke istep_10_* earlier in romstage

Change-Id: I229f3b40d1f8b115eaa1d9d9b9e813a43ee807ae
Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
SergiiDmytruk added a commit that referenced this pull request May 7, 2022
* Start with PCI initialization

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Phase 1 of initialization

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Reorganize code a bit

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Enable RI/DI for PCIe

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* First half of Phase2 (PEC init)

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Second half of Phase2 (PHB init)

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Reorganize code into isteps in romstage

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Remove bad check for dying

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Small code improvements

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Fixes for istep 10.10

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Non-functional code improvements

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Use udelay() where appropriate

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Fixes for istep 14.3

* Small changes for consistency.
* Access some registers through a nest chiplet ID.
* Fix a bug in PEC initialization (ATTR_PROC_PCIE_CACHE_INJ_MODE).

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Fix value of MBOX_SCRATCH_REG6_GROUP_PUMP_MODE

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Remove non-breaking spaces in istep_14_3.c

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Invoke istep_10_* earlier in romstage

Change-Id: I229f3b40d1f8b115eaa1d9d9b9e813a43ee807ae
Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
SergiiDmytruk added a commit that referenced this pull request May 8, 2022
* Start with PCI initialization

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Phase 1 of initialization

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Reorganize code a bit

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Enable RI/DI for PCIe

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* First half of Phase2 (PEC init)

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Second half of Phase2 (PHB init)

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Reorganize code into isteps in romstage

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Remove bad check for dying

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Small code improvements

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Fixes for istep 10.10

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Non-functional code improvements

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Use udelay() where appropriate

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Fixes for istep 14.3

* Small changes for consistency.
* Access some registers through a nest chiplet ID.
* Fix a bug in PEC initialization (ATTR_PROC_PCIE_CACHE_INJ_MODE).

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Fix value of MBOX_SCRATCH_REG6_GROUP_PUMP_MODE

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Remove non-breaking spaces in istep_14_3.c

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Invoke istep_10_* earlier in romstage

Change-Id: I229f3b40d1f8b115eaa1d9d9b9e813a43ee807ae
Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
SergiiDmytruk added a commit that referenced this pull request May 9, 2022
* Start with PCI initialization

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Phase 1 of initialization

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Reorganize code a bit

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Enable RI/DI for PCIe

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* First half of Phase2 (PEC init)

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Second half of Phase2 (PHB init)

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Reorganize code into isteps in romstage

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Remove bad check for dying

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Small code improvements

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Fixes for istep 10.10

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Non-functional code improvements

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Use udelay() where appropriate

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Fixes for istep 14.3

* Small changes for consistency.
* Access some registers through a nest chiplet ID.
* Fix a bug in PEC initialization (ATTR_PROC_PCIE_CACHE_INJ_MODE).

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Fix value of MBOX_SCRATCH_REG6_GROUP_PUMP_MODE

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Remove non-breaking spaces in istep_14_3.c

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Invoke istep_10_* earlier in romstage

Change-Id: I229f3b40d1f8b115eaa1d9d9b9e813a43ee807ae
Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
SergiiDmytruk added a commit that referenced this pull request May 9, 2022
* Start with PCI initialization

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Phase 1 of initialization

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Reorganize code a bit

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Enable RI/DI for PCIe

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* First half of Phase2 (PEC init)

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Second half of Phase2 (PHB init)

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Reorganize code into isteps in romstage

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Remove bad check for dying

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Small code improvements

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Fixes for istep 10.10

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Non-functional code improvements

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Use udelay() where appropriate

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Fixes for istep 14.3

* Small changes for consistency.
* Access some registers through a nest chiplet ID.
* Fix a bug in PEC initialization (ATTR_PROC_PCIE_CACHE_INJ_MODE).

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Fix value of MBOX_SCRATCH_REG6_GROUP_PUMP_MODE

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Remove non-breaking spaces in istep_14_3.c

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Invoke istep_10_* earlier in romstage

Change-Id: I229f3b40d1f8b115eaa1d9d9b9e813a43ee807ae
Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
SergiiDmytruk added a commit that referenced this pull request May 10, 2022
* Start with PCI initialization

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Phase 1 of initialization

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Reorganize code a bit

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Enable RI/DI for PCIe

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* First half of Phase2 (PEC init)

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Second half of Phase2 (PHB init)

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Reorganize code into isteps in romstage

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Remove bad check for dying

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Small code improvements

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Fixes for istep 10.10

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Non-functional code improvements

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Use udelay() where appropriate

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Fixes for istep 14.3

* Small changes for consistency.
* Access some registers through a nest chiplet ID.
* Fix a bug in PEC initialization (ATTR_PROC_PCIE_CACHE_INJ_MODE).

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Fix value of MBOX_SCRATCH_REG6_GROUP_PUMP_MODE

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Remove non-breaking spaces in istep_14_3.c

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Invoke istep_10_* earlier in romstage

Change-Id: I229f3b40d1f8b115eaa1d9d9b9e813a43ee807ae
Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
SergiiDmytruk added a commit that referenced this pull request May 11, 2022
* Start with PCI initialization

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Phase 1 of initialization

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Reorganize code a bit

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Enable RI/DI for PCIe

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* First half of Phase2 (PEC init)

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Second half of Phase2 (PHB init)

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Reorganize code into isteps in romstage

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Remove bad check for dying

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Small code improvements

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Fixes for istep 10.10

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Non-functional code improvements

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Use udelay() where appropriate

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Fixes for istep 14.3

* Small changes for consistency.
* Access some registers through a nest chiplet ID.
* Fix a bug in PEC initialization (ATTR_PROC_PCIE_CACHE_INJ_MODE).

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Fix value of MBOX_SCRATCH_REG6_GROUP_PUMP_MODE

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Remove non-breaking spaces in istep_14_3.c

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Invoke istep_10_* earlier in romstage

Change-Id: I229f3b40d1f8b115eaa1d9d9b9e813a43ee807ae
Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
SergiiDmytruk added a commit that referenced this pull request May 14, 2022
* Start with PCI initialization

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Phase 1 of initialization

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Reorganize code a bit

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Enable RI/DI for PCIe

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* First half of Phase2 (PEC init)

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Second half of Phase2 (PHB init)

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Reorganize code into isteps in romstage

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Remove bad check for dying

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Small code improvements

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Fixes for istep 10.10

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Non-functional code improvements

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Use udelay() where appropriate

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Fixes for istep 14.3

* Small changes for consistency.
* Access some registers through a nest chiplet ID.
* Fix a bug in PEC initialization (ATTR_PROC_PCIE_CACHE_INJ_MODE).

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Fix value of MBOX_SCRATCH_REG6_GROUP_PUMP_MODE

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Remove non-breaking spaces in istep_14_3.c

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Invoke istep_10_* earlier in romstage

Change-Id: I229f3b40d1f8b115eaa1d9d9b9e813a43ee807ae
Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
SergiiDmytruk added a commit that referenced this pull request May 15, 2022
* Start with PCI initialization

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Phase 1 of initialization

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Reorganize code a bit

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Enable RI/DI for PCIe

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* First half of Phase2 (PEC init)

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Second half of Phase2 (PHB init)

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Reorganize code into isteps in romstage

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Remove bad check for dying

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Small code improvements

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Fixes for istep 10.10

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Non-functional code improvements

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Use udelay() where appropriate

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Fixes for istep 14.3

* Small changes for consistency.
* Access some registers through a nest chiplet ID.
* Fix a bug in PEC initialization (ATTR_PROC_PCIE_CACHE_INJ_MODE).

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Fix value of MBOX_SCRATCH_REG6_GROUP_PUMP_MODE

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Remove non-breaking spaces in istep_14_3.c

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Invoke istep_10_* earlier in romstage

Change-Id: I229f3b40d1f8b115eaa1d9d9b9e813a43ee807ae
Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
SergiiDmytruk added a commit that referenced this pull request May 29, 2022
* Start with PCI initialization

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Phase 1 of initialization

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Reorganize code a bit

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Enable RI/DI for PCIe

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* First half of Phase2 (PEC init)

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Second half of Phase2 (PHB init)

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Reorganize code into isteps in romstage

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Remove bad check for dying

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Small code improvements

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Fixes for istep 10.10

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Non-functional code improvements

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Use udelay() where appropriate

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Fixes for istep 14.3

* Small changes for consistency.
* Access some registers through a nest chiplet ID.
* Fix a bug in PEC initialization (ATTR_PROC_PCIE_CACHE_INJ_MODE).

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Fix value of MBOX_SCRATCH_REG6_GROUP_PUMP_MODE

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Remove non-breaking spaces in istep_14_3.c

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Invoke istep_10_* earlier in romstage

Change-Id: I229f3b40d1f8b115eaa1d9d9b9e813a43ee807ae
Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
SergiiDmytruk added a commit that referenced this pull request Aug 24, 2022
* Start with PCI initialization

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Phase 1 of initialization

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Reorganize code a bit

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Enable RI/DI for PCIe

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* First half of Phase2 (PEC init)

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Second half of Phase2 (PHB init)

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Reorganize code into isteps in romstage

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Remove bad check for dying

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Small code improvements

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Fixes for istep 10.10

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Non-functional code improvements

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Use udelay() where appropriate

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Fixes for istep 14.3

* Small changes for consistency.
* Access some registers through a nest chiplet ID.
* Fix a bug in PEC initialization (ATTR_PROC_PCIE_CACHE_INJ_MODE).

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Fix value of MBOX_SCRATCH_REG6_GROUP_PUMP_MODE

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Remove non-breaking spaces in istep_14_3.c

Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>

* Invoke istep_10_* earlier in romstage

Change-Id: I229f3b40d1f8b115eaa1d9d9b9e813a43ee807ae
Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
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2 participants