Introduce MemoryPressureMonitor to detect high memory pressure

[dudikeleti]

Summary of changes

• Add MemoryPressureMonitor to track runtime memory pressure for debugger protection.
• Implement platform-specific memory load:
  • .NET Core 3.1+: use GC.GetGCMemoryInfo() (ratio of MemoryLoadBytes to HighMemoryLoadThresholdBytes).
  • .NET Framework: use WindowsMemoryInfo (P/Invoke to GlobalMemoryStatusEx).
• Detect high pressure using three signals:
  • Memory usage ratio
  • Gen2 collections per second
  • Explicit pressure events (bypasses debouncing for immediate entry)
• Add time-based debouncing and exit margins to prevent flapping:
  • consecutiveHighToEnter, consecutiveLowToExit
  • memoryExitMargin, gen2ExitMargin
• Expose thread-safe, lock-free reads for hot-path properties; schedule refresh via timer or injected scheduler.
• Add deterministic tests with TestScheduler, plus Windows-specific helper tests.

Reason for change

• Provide a robust, testable memory-pressure signal decoupled from integration logic.
• Enables follow-up PRs to wire this into the Circuit Breaker / rate limiting without bloating the diff.

Implementation details

• Default thresholds: 85% memory load, >2 Gen2/sec; exit margins applied to avoid thrashing.
• Debouncing with counters for consecutive high/low cycles; pressure events force immediate entry.
• Thread-safety: a lock is used within refresh; reads use volatile.
• Disposal stops scheduled refresh; post-dispose property reads remain safe.

Test coverage

• State initialization and thread-safety for concurrent reads.
• Event accumulation and clearing across refresh cycles; event bypass of debouncing.
• Debouncing: delayed entry (consecutiveHighToEnter) and delayed exit (consecutiveLowToExit).
• Gen2 activity detection, rapid refresh handling, disposal behavior, scheduler-disposal resilience.
• Windows-only: WindowsMemoryInfo returning valid ratios / available memory (OS/platform-gated).
• Deterministic scheduling with TestScheduler to avoid timing flakiness.

Other details

Non-goals (deferred to follow-up PRs)

• CPU pressure monitoring.
• Integration of memory signals into CircuitBreaker, ProbeRateLimiter, ProtectedSampler, etc.