Switching to dynamically choose int_last

DeepakRajendrakumaran · Dec 18, 2024 · d493325 · d493325
1 parent a9d71a2
commit d493325
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Showing 12 changed files with 65 additions and 3 deletions.
diff --git a/src/coreclr/jit/codegencommon.cpp b/src/coreclr/jit/codegencommon.cpp
@@ -188,6 +188,7 @@ void CodeGenInterface::CopyRegisterInfo()
     rbmFltCalleeTrash = compiler->rbmFltCalleeTrash;
     rbmAllInt         = compiler->rbmAllInt;
     rbmIntCalleeTrash = compiler->rbmIntCalleeTrash;
+    regIntLast        = compiler->regIntLast;
 #endif // TARGET_AMD64
 
     rbmAllMask        = compiler->rbmAllMask;

diff --git a/src/coreclr/jit/codegeninterface.h b/src/coreclr/jit/codegeninterface.h
@@ -79,6 +79,7 @@ class CodeGenInterface
     regMaskTP rbmAllInt;
     regMaskTP rbmFltCalleeTrash;
     regMaskTP rbmIntCalleeTrash;
+    regNumber regIntLast;
 
     FORCEINLINE regMaskTP get_RBM_ALLFLOAT() const
     {
@@ -96,6 +97,11 @@ class CodeGenInterface
     {
         return this->rbmIntCalleeTrash;
     }
+
+    FORCEINLINE regNumber get_REG_INT_LAST() const
+    {
+        return this->regIntLast;
+    }
 #endif // TARGET_AMD64
 
 #if defined(TARGET_XARCH)

diff --git a/src/coreclr/jit/compiler.cpp b/src/coreclr/jit/compiler.cpp
@@ -3393,6 +3393,7 @@ void Compiler::compInitOptions(JitFlags* jitFlags)
     rbmAllInt         = RBM_ALLINT_INIT;
     rbmIntCalleeTrash = RBM_INT_CALLEE_TRASH_INIT;
     cntCalleeTrashInt = CNT_CALLEE_TRASH_INT_INIT;
+    regIntLast = REG_R15;
 
     if (canUseEvexEncoding())
     {
@@ -3406,6 +3407,7 @@ void Compiler::compInitOptions(JitFlags* jitFlags)
         rbmAllInt |= RBM_HIGHINT;
         rbmIntCalleeTrash |= RBM_HIGHINT;
         cntCalleeTrashInt += CNT_CALLEE_TRASH_HIGHINT;
+        regIntLast = REG_R31;
     }
 #endif // TARGET_AMD64
 

diff --git a/src/coreclr/jit/compiler.h b/src/coreclr/jit/compiler.h
@@ -11673,6 +11673,7 @@ class Compiler
     regMaskTP rbmAllInt;
     regMaskTP rbmIntCalleeTrash;
     unsigned  cntCalleeTrashInt;
+    regNumber regIntLast;
 public:
     FORCEINLINE regMaskTP get_RBM_ALLFLOAT() const
     {
@@ -11699,6 +11700,10 @@ class Compiler
     {
         return this->cntCalleeTrashInt;
     }
+    FORCEINLINE regNumber get_REG_INT_LAST() const
+    {
+        return this->regIntLast;
+    }
 
 #endif // TARGET_AMD64
 

diff --git a/src/coreclr/jit/emit.cpp b/src/coreclr/jit/emit.cpp
@@ -754,6 +754,7 @@ void emitter::emitBegCG(Compiler* comp, COMP_HANDLE cmpHandle)
     rbmFltCalleeTrash = emitComp->rbmFltCalleeTrash;
     rbmIntCalleeTrash = emitComp->rbmIntCalleeTrash;
     rbmAllInt         = emitComp->rbmAllInt;
+    regIntLast        = emitComp->regIntLast;
 #endif // TARGET_AMD64
 
 #if defined(TARGET_XARCH)

diff --git a/src/coreclr/jit/emit.h b/src/coreclr/jit/emit.h
@@ -2534,6 +2534,12 @@ class emitter
     {
         return this->rbmAllInt;
     }
+
+    regNumber regIntLast;
+    FORCEINLINE regNumber get_REG_INT_LAST() const
+    {
+        return this->regIntLast;
+    }
 #endif // TARGET_AMD64
 
 #if defined(TARGET_XARCH)

diff --git a/src/coreclr/jit/emitxarch.h b/src/coreclr/jit/emitxarch.h
@@ -10,7 +10,11 @@
 public:
 inline static bool isGeneralRegister(regNumber reg)
 {
+#ifdef TARGET_AMD64
+    return (reg <= REG_INT_LAST_STATIC);
+#else
     return (reg <= REG_INT_LAST);
+#endif
 }
 
 inline static bool isFloatReg(regNumber reg)

diff --git a/src/coreclr/jit/lsra.cpp b/src/coreclr/jit/lsra.cpp
@@ -808,6 +808,7 @@ LinearScan::LinearScan(Compiler* theCompiler)
     rbmFltCalleeTrash = compiler->rbmFltCalleeTrash;
     rbmAllInt         = compiler->rbmAllInt;
     rbmIntCalleeTrash = compiler->rbmIntCalleeTrash;
+    rbmAllInt = compiler->rbmAllInt;
 #endif // TARGET_AMD64
 
 #if defined(TARGET_XARCH)

diff --git a/src/coreclr/jit/lsra.h b/src/coreclr/jit/lsra.h
@@ -1355,6 +1355,11 @@ class LinearScan : public LinearScanInterface
         {
             return this->rbmAllInt;
         }
+        /*regNumber regIntLast;
+        FORCEINLINE unsigned get_REG_INT_LAST() const
+        {
+            return this->regIntLast;
+        }*/
 #endif // TARGET_AMD64
 
 #define REG_SEL_DEF(stat, value, shortname, orderSeqId)      FORCEINLINE void try_##stat();
@@ -2085,6 +2090,11 @@ class LinearScan : public LinearScanInterface
     {
         return this->rbmIntCalleeTrash;
     }
+    regNumber regIntLast;
+        FORCEINLINE regNumber get_REG_INT_LAST() const
+        {
+            return this->regIntLast;
+        }
 #endif // TARGET_AMD64
 
 #if defined(TARGET_XARCH)

diff --git a/src/coreclr/jit/target.h b/src/coreclr/jit/target.h
@@ -608,7 +608,11 @@ static uint32_t BitScanForward(const regMaskTP& mask)
 #endif // TARGET_XARCH
 
 C_ASSERT(REG_FIRST == 0);
+#ifdef TARGET_AMD64
+C_ASSERT(REG_INT_FIRST < REG_INT_LAST_STATIC);
+#else
 C_ASSERT(REG_INT_FIRST < REG_INT_LAST);
+#endif
 C_ASSERT(REG_FP_FIRST  < REG_FP_LAST);
 
 // Opportunistic tail call feature converts non-tail prefixed calls into
@@ -689,7 +693,11 @@ inline bool genIsValidReg(regNumber reg)
  */
 inline bool genIsValidIntReg(regNumber reg)
 {
+#if defined(TARGET_AMD64)
+    return reg >= REG_INT_FIRST && reg <= REG_INT_LAST_STATIC;
+#else
     return reg >= REG_INT_FIRST && reg <= REG_INT_LAST;
+#endif
 }
 
 /*****************************************************************************
@@ -1097,7 +1105,12 @@ inline regNumber regNextOfType(regNumber reg, var_types type)
 
     if (varTypeUsesIntReg(type))
     {
+#if defined(TARGET_AMD64)
+        if (regReturn > REG_INT_LAST_STATIC)
+#else
         if (regReturn > REG_INT_LAST)
+#endif
+
         {
             regReturn = REG_NA;
         }

diff --git a/src/coreclr/jit/targetamd64.h b/src/coreclr/jit/targetamd64.h
@@ -400,8 +400,9 @@
   // The following defines are useful for iterating a regNumber
   #define REG_FIRST                REG_EAX
   #define REG_INT_FIRST            REG_EAX
-  #define REG_INT_LAST             REG_R31
-  #define REG_INT_COUNT            (REG_INT_LAST - REG_INT_FIRST + 1)
+  #define REG_INT_LAST_STATIC           REG_R31
+  #define REG_INT_LAST             get_REG_INT_LAST()
+  #define REG_INT_COUNT            (REG_INT_LAST_STATIC - REG_INT_FIRST + 1)
   #define REG_NEXT(reg)           ((regNumber)((unsigned)(reg) + 1))
   #define REG_PREV(reg)           ((regNumber)((unsigned)(reg) - 1))
 

diff --git a/src/coreclr/jit/utils.cpp b/src/coreclr/jit/utils.cpp
@@ -283,11 +283,19 @@ const char* getRegNameFloat(regNumber reg, var_types type)
 const char* dspRegRange(regMaskTP regMask, size_t& minSiz, const char* sep, regNumber regFirst, regNumber regLast)
 {
 #ifdef FEATURE_MASKED_HW_INTRINSICS
+#if defined(TARGET_AMD64)
+    assert(((regFirst == REG_INT_FIRST) && (regLast == REG_INT_LAST_STATIC)) ||
+#else
     assert(((regFirst == REG_INT_FIRST) && (regLast == REG_INT_LAST)) ||
+#endif
            ((regFirst == REG_FP_FIRST) && (regLast == REG_FP_LAST)) ||
            ((regFirst == REG_MASK_FIRST) && (regLast == REG_MASK_LAST)));
+#else
+#if defined(TARGET_AMD64)
+    assert(((regFirst == REG_INT_FIRST) && (regLast == REG_INT_LAST_STATIC)) ||
 #else
     assert(((regFirst == REG_INT_FIRST) && (regLast == REG_INT_LAST)) ||
+#endif
            ((regFirst == REG_FP_FIRST) && (regLast == REG_FP_LAST)));
 #endif // FEATURE_MASKED_HW_INTRINSICS
 
@@ -431,8 +439,12 @@ void dspRegMask(regMaskTP regMask, size_t minSiz)
     const char* sep = "";
 
     printf("[");
-
+#if defined(TARGET_AMD64)
+    sep = dspRegRange(regMask, minSiz, sep, REG_INT_FIRST, REG_INT_LAST_STATIC);
+#else
     sep = dspRegRange(regMask, minSiz, sep, REG_INT_FIRST, REG_INT_LAST);
+#endif
+
     sep = dspRegRange(regMask, minSiz, sep, REG_FP_FIRST, REG_FP_LAST);
 #ifdef FEATURE_MASKED_HW_INTRINSICS
     sep = dspRegRange(regMask, minSiz, sep, REG_MASK_FIRST, REG_MASK_LAST);