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i5483: Added binutils tests and fixed failures
- Added binutils tests that do encode and match against expected opcodes (this is opposite of the current binutils tests) - Removed 66h prefix to pass binutils test - Broadcast entries were not reachable. Fixed operand size for broadcast. (Updated VNNI tests also) Issue: #5483
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,56 @@ | ||
| #ifdef X64 | ||
|
|
||
| enum { | ||
| ENCODE_FLAG_SET_DST_SIZE_HALF = 1, | ||
| ENCODE_FLAG_Z = 2, | ||
| }; | ||
|
|
||
| # define ASSERT(x) \ | ||
| ((void)((!(x)) ? (dr_fprintf(STDERR, "ASSERT FAILURE: %s:%d: %s\n", \ | ||
| __FILE__, __LINE__, #x), \ | ||
| dr_abort(), 0) \ | ||
| : 0)) | ||
|
|
||
| # define HANDLE_FLAGS(instr, flags) \ | ||
| do { \ | ||
| if (flags & ENCODE_FLAG_Z) { \ | ||
| instr_set_prefix_flag(instr, PREFIX_EVEX_z); \ | ||
| } \ | ||
| if (flags & ENCODE_FLAG_SET_DST_SIZE_HALF) { \ | ||
| opnd_t dst = instr_get_dst(instr, 0); \ | ||
| if (opnd_get_size(dst) == OPSZ_64) \ | ||
| opnd_set_size(&dst, OPSZ_32); \ | ||
| else if (opnd_get_size(dst) == OPSZ_32) \ | ||
| opnd_set_size(&dst, OPSZ_16); \ | ||
| else if (opnd_get_size(dst) == OPSZ_16) \ | ||
| opnd_set_size(&dst, OPSZ_8); \ | ||
| instr_set_dst(instr, 0, dst); \ | ||
| } \ | ||
| } while (0) | ||
|
|
||
| // | ||
| # if VERBOSE | ||
| # define PRINT_TEST_NAME(name) // add fprintf | ||
| # else | ||
| # define PRINT_TEST_NAME(x) | ||
| # endif | ||
|
|
||
| # define ENCODE_TEST_3args(name, opc, flags, arg1, arg2, arg3) \ | ||
| do { \ | ||
| instr_t *instr = INSTR_CREATE_##opc(dc, arg1, arg2, arg3); \ | ||
| PRINT_TEST_NAME(name); \ | ||
| HANDLE_FLAGS(instr, flags); \ | ||
| test_instr_encode(dc, instr, sizeof(name)); \ | ||
| ASSERT(!memcmp(buf, name, sizeof(name))); \ | ||
| } while (0) | ||
|
|
||
| # define ENCODE_TEST_4args(name, opc, flags, arg1, arg2, arg3, arg4) \ | ||
| do { \ | ||
| instr_t *instr = INSTR_CREATE_##opc(dc, arg1, arg2, arg3, arg4); \ | ||
| PRINT_TEST_NAME(name); \ | ||
| HANDLE_FLAGS(instr, flags); \ | ||
| test_instr_encode(dc, instr, sizeof(name)); \ | ||
| ASSERT(!memcmp(buf, name, sizeof(name))); \ | ||
| } while (0) | ||
|
|
||
| #endif |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,32 @@ | ||
| // clang-format off | ||
| byte bf16_test00[] = { 0x62, 0x02, 0x17, 0x40, 0x72, 0xf4,}; // | ||
| byte bf16_test01[] = { 0x62, 0x22, 0x17, 0x47, 0x72, 0xb4, 0xf5, 0x00, 0x00, 0x00, 0x10,}; // | ||
| byte bf16_test02[] = { 0x62, 0x42, 0x17, 0x50, 0x72, 0x31,}; // | ||
| byte bf16_test03[] = { 0x62, 0x62, 0x17, 0x40, 0x72, 0x71, 0x7f,}; // | ||
| byte bf16_test04[] = { 0x62, 0x62, 0x17, 0xd7, 0x72, 0xb2, 0x00, 0xe0, 0xff, 0xff,}; // | ||
| byte bf16_test05[] = { 0x62, 0x02, 0x7e, 0x48, 0x72, 0xf5,}; // | ||
| byte bf16_test06[] = { 0x62, 0x22, 0x7e, 0x4f, 0x72, 0xb4, 0xf5, 0x00, 0x00, 0x00, 0x10,}; // | ||
| byte bf16_test07[] = { 0x62, 0x42, 0x7e, 0x58, 0x72, 0x31,}; // | ||
| byte bf16_test08[] = { 0x62, 0x62, 0x7e, 0x48, 0x72, 0x71, 0x7f,}; // | ||
| byte bf16_test09[] = { 0x62, 0x62, 0x7e, 0xdf, 0x72, 0xb2, 0x00, 0xe0, 0xff, 0xff,}; // | ||
| byte bf16_test10[] = { 0x62, 0x02, 0x16, 0x40, 0x52, 0xf4,}; // | ||
| byte bf16_test11[] = { 0x62, 0x22, 0x16, 0x47, 0x52, 0xb4, 0xf5, 0x00, 0x00, 0x00, 0x10,}; // | ||
| byte bf16_test12[] = { 0x62, 0x42, 0x16, 0x50, 0x52, 0x31,}; // | ||
| byte bf16_test13[] = { 0x62, 0x62, 0x16, 0x40, 0x52, 0x71, 0x7f,}; // | ||
| byte bf16_test14[] = { 0x62, 0x62, 0x16, 0xd7, 0x52, 0xb2, 0x00, 0xe0, 0xff, 0xff,}; // | ||
|
|
||
| ENCODE_TEST_4args(bf16_test00, vcvtne2ps2bf16_mask, 0, REGARG (ZMM30), REGARG(K0), REGARG (ZMM29), REGARG (ZMM28)); | ||
| ENCODE_TEST_4args(bf16_test01, vcvtne2ps2bf16_mask, 0, REGARG (ZMM30), REGARG(K7), REGARG (ZMM29), opnd_create_base_disp(DR_REG_RBP, DR_REG_R14, 8, 0x10000000, OPSZ_64)); | ||
| ENCODE_TEST_4args(bf16_test02, vcvtne2ps2bf16_mask, 0, REGARG (ZMM30), REGARG(K0), REGARG (ZMM29), opnd_create_base_disp(DR_REG_R9, DR_REG_NULL, 0, 0, OPSZ_4)); | ||
| ENCODE_TEST_4args(bf16_test03, vcvtne2ps2bf16_mask, 0, REGARG (ZMM30), REGARG(K0), REGARG (ZMM29), opnd_create_base_disp(DR_REG_RCX, DR_REG_NULL, 0, 0x1fc0, OPSZ_64)); | ||
| ENCODE_TEST_4args(bf16_test04, vcvtne2ps2bf16_mask, ENCODE_FLAG_Z, REGARG (ZMM30), REGARG(K7), REGARG (ZMM29), opnd_create_base_disp(DR_REG_RDX, DR_REG_NULL, 0, 0xffffe000, OPSZ_4)); | ||
| ENCODE_TEST_3args(bf16_test05, vcvtneps2bf16_mask, ENCODE_FLAG_SET_DST_SIZE_HALF, REGARG (ZMM30), REGARG(K0), REGARG (ZMM29)); | ||
| ENCODE_TEST_3args(bf16_test06, vcvtneps2bf16_mask, ENCODE_FLAG_SET_DST_SIZE_HALF, REGARG (ZMM30), REGARG(K7), opnd_create_base_disp(DR_REG_RBP, DR_REG_R14, 8, 0x10000000, OPSZ_64)); | ||
| ENCODE_TEST_3args(bf16_test07, vcvtneps2bf16_mask, ENCODE_FLAG_SET_DST_SIZE_HALF, REGARG (ZMM30), REGARG(K0), opnd_create_base_disp(DR_REG_R9, DR_REG_NULL, 0, 0, OPSZ_4)); | ||
| ENCODE_TEST_3args(bf16_test08, vcvtneps2bf16_mask, ENCODE_FLAG_SET_DST_SIZE_HALF, REGARG (ZMM30), REGARG(K0), opnd_create_base_disp(DR_REG_RCX, DR_REG_NULL, 0, 0x1fc0, OPSZ_64)); | ||
| ENCODE_TEST_3args(bf16_test09, vcvtneps2bf16_mask, ENCODE_FLAG_SET_DST_SIZE_HALF|ENCODE_FLAG_Z, REGARG (ZMM30), REGARG(K7), opnd_create_base_disp(DR_REG_RDX, DR_REG_NULL, 0, 0xffffe000, OPSZ_4)); | ||
| ENCODE_TEST_4args(bf16_test10, vdpbf16ps_mask, 0, REGARG (ZMM30), REGARG(K0), REGARG (ZMM29), REGARG (ZMM28)); | ||
| ENCODE_TEST_4args(bf16_test11, vdpbf16ps_mask, 0, REGARG (ZMM30), REGARG(K7), REGARG (ZMM29), opnd_create_base_disp(DR_REG_RBP, DR_REG_R14, 8, 0x10000000, OPSZ_64)); | ||
| ENCODE_TEST_4args(bf16_test12, vdpbf16ps_mask, 0, REGARG (ZMM30), REGARG(K0), REGARG (ZMM29), opnd_create_base_disp(DR_REG_R9, DR_REG_NULL, 0, 0, OPSZ_4)); | ||
| ENCODE_TEST_4args(bf16_test13, vdpbf16ps_mask, 0, REGARG (ZMM30), REGARG(K0), REGARG (ZMM29), opnd_create_base_disp(DR_REG_RCX, DR_REG_NULL, 0, 0x1fc0, OPSZ_64)); | ||
| ENCODE_TEST_4args(bf16_test14, vdpbf16ps_mask, ENCODE_FLAG_Z, REGARG (ZMM30), REGARG(K7), REGARG (ZMM29), opnd_create_base_disp(DR_REG_RDX, DR_REG_NULL, 0, 0xffffe000, OPSZ_4)); |
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