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i#2626 AArch64 codec: Move features to correct arch version
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The AArch64 codec is split by v8.x architecture version but the features
grouped into the v8.6 files were actually from earlier architecture
versions.

BF16 -> v8.2
I8MM -> v8.2
MTE  -> v8.5
MTE2 -> v8.5

This commit just moves the 4 features into the correct files. This should
just be a cosmetic change.

Issue: #2626
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@jackgallagher-arm
jackgallagher-arm committed May 20, 2024
1 parent e0dbc50 commit dca7879
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Showing 15 changed files with 1,796 additions and 1,945 deletions.
2 changes: 0 additions & 2 deletions core/ir/aarch64/codec.c
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Expand Up @@ -9730,7 +9730,6 @@ decode_category(uint encoding, instr_t *instr)
#include "opnd_encode_funcs.h"
#include "decode_gen_sve2.h"
#include "decode_gen_sve.h"
#include "decode_gen_v86.h"
#include "decode_gen_v85.h"
#include "decode_gen_v84.h"
#include "decode_gen_v83.h"
Expand All @@ -9739,7 +9738,6 @@ decode_category(uint encoding, instr_t *instr)
#include "decode_gen_v80.h"
#include "encode_gen_sve2.h"
#include "encode_gen_sve.h"
#include "encode_gen_v86.h"
#include "encode_gen_v85.h"
#include "encode_gen_v84.h"
#include "encode_gen_v83.h"
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4 changes: 2 additions & 2 deletions core/ir/aarch64/codec.py
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Expand Up @@ -666,11 +666,11 @@ def main():
output_dir = sys.argv[2]

# The Arm AArch64's architecture versions supported by the DynamoRIO codec.
# Currently, v8.0 is fully supported, while v8.1, v8.2, v8.3, v8.4, v8.6, SVE,
# Currently, v8.0 is fully supported, while v8.1, v8.2, v8.3, v8.4, SVE,
# and SVE2 are partially supported. The null terminator element at the end
# is required by some generator functions to correctly generate links
# between each version's decode/encode logic.
isa_versions = ['v80', 'v81', 'v82', 'v83', 'v84', 'v85', 'v86', 'sve', 'sve2', '']
isa_versions = ['v80', 'v81', 'v82', 'v83', 'v84', 'v85', 'sve', 'sve2', '']

# Read the instruction operand definitions. Used by the codec when
# generating code to decode and encode instructions.
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16 changes: 16 additions & 0 deletions core/ir/aarch64/codec_v82.txt
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Expand Up @@ -35,6 +35,16 @@
# Instruction definitions:

11001110001xxxxx0xxxxxxxxxxxxxxx n 599 SHA3 bcax q0 : q5 q16 q10 b_const_sz
0001111001100011010000xxxxxxxxxx n 953 BF16 bfcvt h0 : s5
0000111010100001011010xxxxxxxxxx n 973 BF16 bfcvtn d0 : q5 s_const_sz
0100111010100001011010xxxxxxxxxx n 974 BF16 bfcvtn2 q0 : q5 s_const_sz
0x101110010xxxxx111111xxxxxxxxxx n 954 BF16 bfdot dq0 : dq0 dq5 dq16 h_sz
0x00111101xxxxxx1111x0xxxxxxxxxx n 954 BF16 bfdot dq0 : dq0 dq5 q16 vindex_S h_sz
00101110110xxxxx111111xxxxxxxxxx n 955 BF16 bfmlalb q0 : q0 q5 q16 h_sz
0000111111xxxxxx1111x0xxxxxxxxxx n 955 BF16 bfmlalb q0 : q0 q5 q4_16 vindex_H h_sz
01101110110xxxxx111111xxxxxxxxxx n 956 BF16 bfmlalt q0 : q0 q5 q16 h_sz
0100111111xxxxxx1111x0xxxxxxxxxx n 956 BF16 bfmlalt q0 : q0 q5 q4_16 vindex_H h_sz
01101110010xxxxx111011xxxxxxxxxx n 957 BF16 bfmmla q0 : q0 q5 q16 h_sz
11001110000xxxxx0xxxxxxxxxxxxxxx n 600 SHA3 eor3 q0 : q5 q16 q10 b_const_sz
11010101000000110010001000011111 n 601 RAS esb :
0x101110110xxxxx000101xxxxxxxxxx n 94 FP16 fabd dq0 : dq5 dq16 h_sz
Expand Down Expand Up @@ -209,6 +219,8 @@ x001111011100001000000xxxxxxxxxx n 120 FP16 fcvtnu wx0 : h5
11001110010xxxxx10xx11xxxxxxxxxx n 592 SM3 sm3tt2b q0 : q5 q16 imm2idx s_const_sz
1100111011000000100001xxxxxxxxxx n 593 SM4 sm4e q0 : q5 s_const_sz
11001110011xxxxx110010xxxxxxxxxx n 594 SM4 sm4ekey q0 : q5 q16 s_const_sz
01001110100xxxxx101001xxxxxxxxxx n 958 I8MM smmla q0 : q0 q5 q16 b_const_sz
0x00111100xxxxxx1111x0xxxxxxxxxx n 959 I8MM sudot dq0 : dq0 dq5 q16 vindex_S b_const_sz
0010111001111001110110xxxxxxxxxx n 510 FP16 ucvtf d0 : d5 h_sz
0110111001111001110110xxxxxxxxxx n 510 FP16 ucvtf q0 : q5 h_sz
0001111011100011000000xxxxxxxxxx n 510 FP16 ucvtf h0 : w5
Expand All @@ -218,4 +230,8 @@ x001111011100001000000xxxxxxxxxx n 120 FP16 fcvtnu wx0 : h5
0111111001111001110110xxxxxxxxxx n 510 FP16 ucvtf h0 : h5
0x101110100xxxxx100101xxxxxxxxxx n 512 DotProd udot dq0 : dq0 dq5 dq16 b_const_sz
0x10111110xxxxxx1110x0xxxxxxxxxx n 512 DotProd udot dq0 : dq0 dq5 q16 vindex_SD b_const_sz
01101110100xxxxx101001xxxxxxxxxx n 960 I8MM ummla q0 : q0 q5 q16 b_const_sz
0x001110100xxxxx100111xxxxxxxxxx n 961 I8MM usdot dq0 : dq0 dq5 dq16 b_const_sz
0x00111110xxxxxx1111x0xxxxxxxxxx n 961 I8MM usdot dq0 : dq0 dq5 q16 vindex_S b_const_sz
01001110100xxxxx101011xxxxxxxxxx n 962 I8MM usmmla q0 : q0 q5 q16 b_const_sz
11001110100xxxxxxxxxxxxxxxxxxxxx n 604 SHA3 xar q0 : q5 q16 imm6 d_const_sz
52 changes: 39 additions & 13 deletions core/ir/aarch64/codec_v85.txt
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Expand Up @@ -35,16 +35,42 @@
# generation.

# Instruction definitions:
110101010000001100100100xx011111 n 1211 BTI bti : imm2_6
0x1011100x100001111010xxxxxxxxxx n 1212 FRINTTS frint32x vdq_q_sd_0 : vdq_q_sd_5
0001111001101000110000xxxxxxxxxx n 1212 FRINTTS frint32x d0 : d5
0001111000101000110000xxxxxxxxxx n 1212 FRINTTS frint32x s0 : s5
0x0011100x100001111010xxxxxxxxxx n 1213 FRINTTS frint32z vdq_q_sd_0 : vdq_q_sd_5
0001111001101000010000xxxxxxxxxx n 1213 FRINTTS frint32z d0 : d5
0001111000101000010000xxxxxxxxxx n 1213 FRINTTS frint32z s0 : s5
0x1011100x100001111110xxxxxxxxxx n 1214 FRINTTS frint64x vdq_q_sd_0 : vdq_q_sd_5
0001111001101001110000xxxxxxxxxx n 1214 FRINTTS frint64x d0 : d5
0001111000101001110000xxxxxxxxxx n 1214 FRINTTS frint64x s0 : s5
0x0011100x100001111110xxxxxxxxxx n 1215 FRINTTS frint64z vdq_q_sd_0 : vdq_q_sd_5
0001111001101001010000xxxxxxxxxx n 1215 FRINTTS frint64z d0 : d5
0001111000101001010000xxxxxxxxxx n 1215 FRINTTS frint64z s0 : s5

1001000110xxxxxx^^xxxxxxxxxxxxxx n 1207 MTE addg x0sp : x5sp imm6_16_tag imm4_10
110101010000001100100100xx011111 n 1211 BTI bti : imm2_6
0x1011100x100001111010xxxxxxxxxx n 1212 FRINTTS frint32x vdq_q_sd_0 : vdq_q_sd_5
0001111001101000110000xxxxxxxxxx n 1212 FRINTTS frint32x d0 : d5
0001111000101000110000xxxxxxxxxx n 1212 FRINTTS frint32x s0 : s5
0x0011100x100001111010xxxxxxxxxx n 1213 FRINTTS frint32z vdq_q_sd_0 : vdq_q_sd_5
0001111001101000010000xxxxxxxxxx n 1213 FRINTTS frint32z d0 : d5
0001111000101000010000xxxxxxxxxx n 1213 FRINTTS frint32z s0 : s5
0x1011100x100001111110xxxxxxxxxx n 1214 FRINTTS frint64x vdq_q_sd_0 : vdq_q_sd_5
0001111001101001110000xxxxxxxxxx n 1214 FRINTTS frint64x d0 : d5
0001111000101001110000xxxxxxxxxx n 1214 FRINTTS frint64x s0 : s5
0x0011100x100001111110xxxxxxxxxx n 1215 FRINTTS frint64z vdq_q_sd_0 : vdq_q_sd_5
0001111001101001010000xxxxxxxxxx n 1215 FRINTTS frint64z d0 : d5
0001111000101001010000xxxxxxxxxx n 1215 FRINTTS frint64z s0 : s5
10011010110xxxxx000101xxxxxxxxxx n 1203 MTE gmi x0 : x5sp x16
10011010110xxxxx000100xxxxxxxxxx n 1204 MTE irg x0sp : x5sp x16
11011001011xxxxxxxxx00xxxxxxxxxx n 1201 MTE ldg x0 : x0 mem9_tag
1101100111100000000000xxxxxxxxxx n 1218 MTE2 ldgm x0 : mem9_tag
11011001101xxxxxxxxx01xxxxxxxxxx n 1197 MTE st2g mem9post_tag x5sp : x0sp x5sp mem9off_tag
11011001101xxxxxxxxx11xxxxxxxxxx n 1197 MTE st2g mem9_tag x5sp : x0sp x5sp mem9off_tag
11011001101xxxxxxxxx10xxxxxxxxxx n 1197 MTE st2g mem9_tag : x0sp
11011001001xxxxxxxxx01xxxxxxxxxx n 1198 MTE stg mem9post_tag x5sp : x0sp x5sp mem9off_tag
11011001001xxxxxxxxx11xxxxxxxxxx n 1198 MTE stg mem9_tag x5sp : x0sp x5sp mem9off_tag
11011001001xxxxxxxxx10xxxxxxxxxx n 1198 MTE stg mem9_tag : x0sp
1101100110100000000000xxxxxxxxxx n 1216 MTE2 stgm mem9_tag : x0
0110100010xxxxxxxxxxxxxxxxxxxxxx n 1202 MTE stgp mem7post_tag x5sp : x0 x10 x5sp mem7off_tag
0110100110xxxxxxxxxxxxxxxxxxxxxx n 1202 MTE stgp mem7_tag x5sp : x0 x10 x5sp mem7off_tag
0110100100xxxxxxxxxxxxxxxxxxxxxx n 1202 MTE stgp mem7_tag : x0 x10
11011001111xxxxxxxxx01xxxxxxxxxx n 1199 MTE stz2g mem9post_tag x5sp : x0sp x5sp mem9off_tag
11011001111xxxxxxxxx11xxxxxxxxxx n 1199 MTE stz2g mem9_tag x5sp : x0sp x5sp mem9off_tag
11011001111xxxxxxxxx10xxxxxxxxxx n 1199 MTE stz2g mem9_tag : x0sp
11011001011xxxxxxxxx01xxxxxxxxxx n 1200 MTE stzg mem9post_tag x5sp : x0sp x5sp mem9off_tag
11011001011xxxxxxxxx11xxxxxxxxxx n 1200 MTE stzg mem9_tag x5sp : x0sp x5sp mem9off_tag
11011001011xxxxxxxxx10xxxxxxxxxx n 1200 MTE stzg mem9_tag : x0sp
1101100100100000000000xxxxxxxxxx n 1217 MTE2 stzgm mem9_tag : x0
1101000110xxxxxx^^xxxxxxxxxxxxxx n 1208 MTE subg x0sp : x5sp imm6_16_tag imm4_10
10011010110xxxxx000000xxxxxxxxxx n 1205 MTE subp x0 : x5sp x16sp
10111010110xxxxx000000xxxxxxxxxx n 1206 MTE subps x0 : x5sp x16sp
79 changes: 0 additions & 79 deletions core/ir/aarch64/codec_v86.txt
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This file was deleted.

3 changes: 0 additions & 3 deletions make/CMake_aarch64_gen_codec.cmake
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Expand Up @@ -44,14 +44,12 @@ set(AARCH64_CODEC_GEN_SRCS
${PROJECT_BINARY_DIR}/decode_gen_v81.h
${PROJECT_BINARY_DIR}/decode_gen_v82.h
${PROJECT_BINARY_DIR}/decode_gen_v83.h
${PROJECT_BINARY_DIR}/decode_gen_v86.h
${PROJECT_BINARY_DIR}/decode_gen_sve.h
${PROJECT_BINARY_DIR}/decode_gen_sve2.h
${PROJECT_BINARY_DIR}/encode_gen_v80.h
${PROJECT_BINARY_DIR}/encode_gen_v81.h
${PROJECT_BINARY_DIR}/encode_gen_v82.h
${PROJECT_BINARY_DIR}/encode_gen_v83.h
${PROJECT_BINARY_DIR}/encode_gen_v86.h
${PROJECT_BINARY_DIR}/encode_gen_sve.h
${PROJECT_BINARY_DIR}/encode_gen_sve2.h
${PROJECT_BINARY_DIR}/opcode_names.h
Expand Down Expand Up @@ -84,7 +82,6 @@ add_custom_command(
${PROJECT_SOURCE_DIR}/core/ir/${ARCH_NAME}/codec_v83.txt
${PROJECT_SOURCE_DIR}/core/ir/${ARCH_NAME}/codec_v84.txt
${PROJECT_SOURCE_DIR}/core/ir/${ARCH_NAME}/codec_v85.txt
${PROJECT_SOURCE_DIR}/core/ir/${ARCH_NAME}/codec_v86.txt
${PROJECT_SOURCE_DIR}/core/ir/${ARCH_NAME}/codec_sve.txt
${PROJECT_SOURCE_DIR}/core/ir/${ARCH_NAME}/codec_sve2.txt
COMMAND ${PYTHON_EXECUTABLE}
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4 changes: 2 additions & 2 deletions make/aarch64_check_codec_order.py
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Expand Up @@ -109,8 +109,8 @@ def main():

# The Arm AArch64's architecture versions supported by the DynamoRIO codec.
# Currently, v8.0 is fully supported, while v8.1, v8.2, v8.3, v8.4, v8.5,
# v8.6, SVE, and SVE2 are partially supported.
isa_versions = ['v80', 'v81', 'v82', 'v83', 'v84', 'v85', 'v86', 'sve', 'sve2']
# SVE, and SVE2 are partially supported.
isa_versions = ['v80', 'v81', 'v82', 'v83', 'v84', 'v85', 'sve', 'sve2']

codecsort_py = os.path.join(src_dir, "codecsort.py")

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5 changes: 1 addition & 4 deletions suite/tests/CMakeLists.txt
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Expand Up @@ -490,7 +490,7 @@ endfunction(append_link_flags)
# TODO i#6429 Change this allowlist to a blocklist.
set(sve_tests
simple_app api.ir api.ir_negative api.ir_v81 api.ir_v82 api.ir_v83 api.ir_v84
api.ir_v85 api.ir_v86 api.ir_sve api.ir_sve2 api.ir-static api.drdecode
api.ir_v85 api.ir_sve api.ir_sve2 api.ir-static api.drdecode
common.broadfun common.nzcv common.getretaddr common.segfault
common.allasm_aarch64_isa common.allasm_aarch64_cache allasm_aarch64_prefetch
allasm_aarch64_flush libutil.frontend_test libutil.drconfig_test
Expand Down Expand Up @@ -2030,7 +2030,6 @@ if (NOT ANDROID)
tobuild_api(api.ir_v83 api/ir_aarch64_v83.c "" "" OFF OFF OFF)
tobuild_api(api.ir_v84 api/ir_aarch64_v84.c "" "" OFF OFF OFF)
tobuild_api(api.ir_v85 api/ir_aarch64_v85.c "" "" OFF OFF OFF)
tobuild_api(api.ir_v86 api/ir_aarch64_v86.c "" "" OFF OFF OFF)
tobuild_api(api.ir_sve api/ir_aarch64_sve.c "" "" OFF OFF OFF)
tobuild_api(api.ir_sve2 api/ir_aarch64_sve2.c "" "" OFF OFF OFF)
endif (AARCH64)
Expand Down Expand Up @@ -3246,8 +3245,6 @@ elseif (AARCH64)
"-q;${CMAKE_CURRENT_SOURCE_DIR}/api/dis-a64-v84.txt" OFF OFF)
torunonly_api(api.dis-a64-v85 api.dis-a64 api/dis-a64.c ""
"-q;${CMAKE_CURRENT_SOURCE_DIR}/api/dis-a64-v85.txt" OFF OFF)
torunonly_api(api.dis-a64-v86 api.dis-a64 api/dis-a64.c ""
"-q;${CMAKE_CURRENT_SOURCE_DIR}/api/dis-a64-v86.txt" OFF OFF)
torunonly_api(api.dis-a64-sve api.dis-a64 api/dis-a64.c ""
"-q;${CMAKE_CURRENT_SOURCE_DIR}/api/dis-a64-sve.txt" OFF OFF)
torunonly_api(api.dis-a64-sve2 api.dis-a64 api/dis-a64.c ""
Expand Down
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