i#1569 AArch64: Add macro to create ADR and ADRP instructions. #2317
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Also adds support for instruction operands to ADR and ADRP encoders.
derekbruening
requested changes
Mar 31, 2017
core/arch/aarch64/codec.c
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| uint bits; | ||
| if (!opnd_is_rel_addr(opnd)) | ||
| if (opnd_is_rel_addr(opnd)) |
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style: {} for multi-line body
core/arch/aarch64/codec.c
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| if (opnd_is_rel_addr(opnd)) | ||
| offset = (ptr_int_t)opnd_get_addr(opnd) - | ||
| (ptr_int_t)((ptr_uint_t)pc >> scale << scale); | ||
| else if (opnd.kind == INSTR_kind) |
core/arch/aarch64/codec.c
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| if (opnd_is_rel_addr(opnd)) | ||
| offset = (ptr_int_t)opnd_get_addr(opnd) - | ||
| (ptr_int_t)((ptr_uint_t)pc >> scale << scale); | ||
| else if (opnd.kind == INSTR_kind) |
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Prefer the interface opnd_is_instr()
|
nit: commit body starting with "Also" is a little odd (normally the title's content is included in the body) |
derekbruening
approved these changes
Mar 31, 2017
| @@ -334,6 +334,10 @@ | |||
| instr_create_1dst_4src((dc), OP_sub, (rd), (rn), (rm_or_imm), (sht), (sha)) | |||
| #define INSTR_CREATE_svc(dc, imm) \ | |||
| instr_create_0dst_1src((dc), OP_svc, (imm)) | |||
| #define INSTR_CREATE_adr(dc, rt, imm) \ | |||
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There's no doxygen header for these. Looking above: there isn't for any of these. Thus these will not show up in the html docs at all.
OK I see above a FIXME for adding them -- but I would suggest including them on any new code. The original suggestion, still in place, is to automatically generate all of these (including the doxygen).
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Also adds support for instruction operands to ADR and ADRP encoders.