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i#1686 decoder tests: Add some missing OP_vbic_{i16,i32} encodings. #2493
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Replace some "INVALID" lines in A32_ext_simd8. Also correct the opcodes in A32_ext_bit19. Change-Id: I5fcf10fd028da215730a4f2327a317ab1f2a9e98
If you're working on the missing opcodes for #2465, please assign to yourself to avoid duplicate work -- I was planning to fill in the missing decode table entries and just now was going to assign to me. |
Are any other encodings known to be missing? Probably i#2465 can be closed after this, though there are a couple of other matters arising there which might be worth creating an issue for, depending on what you and other people think: DEBUG=intermediate and non-DEBUG ASSERTs/printfs. |
Please reference #2465 here |
Shall I just add the following paragraph to the log message? This fixes the primary cause of the crash reported in i#2465. Or shall I change the issue number and add "Fixes #2565"? |
(That would be "i#2465 A32 decoder: Add some missing ..." in the latter case.) |
I assume you are also fixing the internal consistency error and have a separate patch for that? (It is hard to tell as not everything seems to be posted in the issue.) |
I don't think I've considered any internal consistency error. |
Proposed new log message:
|
Without fixing the internal consistency it doesn't "fixes #2465": it only fixes 1 of the 6 issues. I guess 4 of them are covered by other issues but the internal consistency remains. |
Updated log message: i#2465 A32 decoder: Add some missing SIMD encodings. Replace some "INVALID" lines in A32_ext_simd8 with missing encodings: OP_vbic_{i16,i32} and OP_vmov_f32. Also correct the opcodes in A32_ext_bit19. Xref #1686. Change-Id: I150ddc01484a7cbf5a866d8ab40940ebe7a9311c
I think the "Encode/decode inconsistency" would be a separate pull request. It doesn't involve SIMD, I don't know whether it involves the decoder, and I don't yet have the test case to reproduce it. |
AppVeyor failure is #2246. |
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Please note that in general changing these tables requires re-running the encode chain script and the instr create script (not fully automated, they are manually run with manually inserted output for the macros). In this case we don't expect either script to change anything as these are all dup entries but we don't want to break them and they may catch something we humans can't easily see (esp w/o as many arm tests as we'd like).
The title is now too narrow.
Thank you for fixing this (though next time please self-assign the issue prior to starting coding).
@@ -298,11 +298,11 @@ const instr_info_t A32_ext_bit7[][2] = { | |||
*/ | |||
const instr_info_t A32_ext_bit19[][2] = { | |||
{ /* 0 */ | |||
{EXT_SIMD8, 0xf2800000, "(ext simd8 0)", xx, xx, xx, xx, xx, no, x, 0}, | |||
{EXT_SIMD5, 0xf2880000, "(ext simd5 0)", xx, xx, xx, xx, xx, no, x, 0}, | |||
{EXT_SIMD8, 0xf2800010, "(ext simd8 0)", xx, xx, xx, xx, xx, no, x, 0}, |
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OK, it looks like all children have bit 4 set, but it doesn't really matter at this split point: just informative, nothing reads it.
Replace some "INVALID" lines in A32_ext_simd8.
Also correct the opcodes in A32_ext_bit19.
Change-Id: I5fcf10fd028da215730a4f2327a317ab1f2a9e98