i#1569 AArch64: Make encodings easier to specify. #2549
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In the operand definitions, in codec.txt, '?' indicates a bit that the operand decoder/encoder may consult as it decodes or encodes the bits labelled 'x'. An operand encoder only receives the bits labelled '?'; an operand decoder only receives the bits labelled '?' or 'x'. An operand encoder may generate a bit that is read by another operand encoder, provided there is no cyclic dependency. This change makes it easier to specify some encodings, and to detect errors. A few changes are made exploiting the new facilities: - memvrpost is removed: memvr is sufficient - some patterns for SIMD load/store structure are combined - some patterns for data processing with shifted register are combined Change-Id: Ic5ef256af143239521c4cea86631dabebd763ea1
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AppVeyor failure looks like #2246. |
derekbruening
approved these changes
Jul 20, 2017
| @@ -1128,12 +1128,16 @@ encode_opnd_imm5(uint enc, int opcode, byte *pc, opnd_t opnd, OUT uint *enc_out) | |||
| static inline bool | |||
| decode_opnd_imm6(uint enc, int opcode, byte *pc, OUT opnd_t *opnd) | |||
| { | |||
| if (!TEST(1U << 31, enc) && TEST(1U << 15, enc)) | |||
| return false; | |||
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Not sure I see where this is coming from. This is a bug fix? Should be mentioned in the commit message? Same below.
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It has to do with "data processing with shifted register". I've added a parenthesis to the draft log message ("comment") above.
core/arch/aarch64/codec.py
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| for i in range(len(srcs))] | ||
| c += [' return true;', | ||
| '}', | ||
| ''] |
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This is all just cosmetic?
core/arch/aarch64/codec.py
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| gen(c, pats1, depth + 1) | ||
| c.append('%s}' % indent) | ||
| c += ['%s}' % indent] |
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All of these s/append/+=/ seem to confuse the issue here: unrelated to the content changes, right? Maybe better to be a separate CL.
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I'll undo the cosmetic changes for now.
Unrelated addition to log message: (for which "imm6" is modified: it now checks bit 31 for consistency) Change-Id: I194956ff90ce2f039f350ec057271e00e97da192
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In the operand definitions, in codec.txt, '?' indicates a bit that
the operand decoder/encoder may consult as it decodes or encodes the
bits labelled 'x'. An operand encoder only receives the bits
labelled '?'; an operand decoder only receives the bits labelled '?'
or 'x'. An operand encoder may generate a bit that is read by another
operand encoder, provided there is no cyclic dependency. This change
makes it easier to specify some encodings, and to detect errors.
A few changes are made exploiting the new facilities:
(for which "imm6" is modified: it now checks bit 31 for consistency)
Change-Id: Ic5ef256af143239521c4cea86631dabebd763ea1