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i#1569 AArch64: Fix macros to create AND,ANDs with imms. #3010
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Instructions that take logical immediates are not encoded with shifts. Issue: #1569 Change-Id: Ib85757d2bdb6c05008d14be47f4d706a85f4f58f
Change-Id: I3b637ac879fdc16c1b6b895b458ab13192210b28
{ | ||
byte *pc; | ||
instr_t *instr; | ||
|
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instr = INSTR_CREATE_and(dc, opnd_create_reg(DR_REG_X10), | ||
opnd_create_reg(DR_REG_X9), OPND_CREATE_INT(0xFFFF)); |
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(There's an issue on auto-generating the INSTR_CREATE_ macros -- and presumably the tests as well.)
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(y) I'll check with @AssadHashmi, not sure how far he got so far. At least for the remaining NEON instructions, I try to generate most things. Except for some instructions with uncommon operands, like fmov.
core/arch/aarch64/instr_create.h
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INSTR_CREATE_and_shift(dc, rd, rn, rm_or_imm, OPND_CREATE_LSL(), OPND_CREATE_INT(0)) | ||
opnd_is_immed(rm_or_imm) ? instr_create_1dst_2src((dc), OP_and, (rd), (rn), (rm_or_imm)) : \ | ||
INSTR_CREATE_and_shift(dc, rd, rn, rm_or_imm, OPND_CREATE_LSL(), \ | ||
OPND_CREATE_INT(0)) |
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Put () around the whole thing for safety
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Done, thank you very much!
core/arch/aarch64/instr_create.h
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INSTR_CREATE_ands_shift(dc, rd, rn, rm_or_imm, OPND_CREATE_LSL(), OPND_CREATE_INT(0)) | ||
opnd_is_immed(rm_or_imm) ? instr_create_1dst_2src((dc), OP_ands, (rd), (rn), (rm_or_imm)) : \ | ||
INSTR_CREATE_ands_shift(dc, rd, rn, rm_or_imm, OPND_CREATE_LSL(), \ | ||
OPND_CREATE_INT(0)) |
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Put () around the whole thing for safety
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Done
Instructions that take logical immediates are not encoded with shifts and the
macros were broken for them.
Issue: #1569