feat(usart): enable DMA periph clock

EdgeTX · Jul 12, 2023 · d8d4619 · d8d4619
1 parent 47a951c
commit d8d4619
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Showing 8 changed files with 37 additions and 16 deletions.
diff --git a/radio/src/targets/common/arm/stm32/CMakeLists.txt b/radio/src/targets/common/arm/stm32/CMakeLists.txt
@@ -43,6 +43,7 @@ set(FIRMWARE_TARGET_SRC ${FIRMWARE_TARGET_SRC}
   ../common/arm/stm32/module_timer_driver.cpp
   ../common/arm/stm32/stm32_switch_driver.cpp
   ../common/arm/stm32/stm32_adc.cpp
+  ../common/arm/stm32/stm32_dma.cpp
   ../common/arm/stm32/stm32_gpio_driver.cpp
   ../common/arm/stm32/mixer_scheduler_driver.cpp
   )

diff --git a/radio/src/targets/common/arm/stm32/stm32_dma.cpp b/radio/src/targets/common/arm/stm32/stm32_dma.cpp
@@ -0,0 +1,32 @@
+/*
+ * Copyright (C) EdgeTx
+ *
+ * Based on code named
+ *   opentx - https://github.com/opentx/opentx
+ *   th9x - http://code.google.com/p/th9x
+ *   er9x - http://code.google.com/p/er9x
+ *   gruvin9x - http://code.google.com/p/gruvin9x
+ *
+ * License GPLv2: http://www.gnu.org/licenses/gpl-2.0.html
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include "stm32_dma.h"
+#include "STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_bus.h"
+
+void stm32_dma_enable_clock(DMA_TypeDef* DMAx)
+{
+  if (DMAx == DMA1) {
+    LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMA1);
+  } else if (DMAx == DMA2) {
+    LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMA2);
+  }
+}
diff --git a/radio/src/targets/common/arm/stm32/stm32_dma.h b/radio/src/targets/common/arm/stm32/stm32_dma.h
@@ -47,3 +47,5 @@ inline static bool stm32_dma_check_tc_flag(DMA_TypeDef* DMAx, uint32_t DMA_Strea
 
   return true;
 }
+
+void stm32_dma_enable_clock(DMA_TypeDef* DMAx);
diff --git a/radio/src/targets/common/arm/stm32/stm32_usart_driver.cpp b/radio/src/targets/common/arm/stm32/stm32_usart_driver.cpp
@@ -179,6 +179,7 @@ void stm32_usart_init_rx_dma(const stm32_usart_t* usart, const void* buffer, uin
     NVIC_DisableIRQ(usart->IRQn);
   }
 
+  stm32_dma_enable_clock(usart->rxDMA);
   LL_DMA_DeInit(usart->rxDMA, usart->rxDMA_Stream);
 
   LL_DMA_InitTypeDef dmaInit;
@@ -346,6 +347,7 @@ void stm32_usart_send_buffer(const stm32_usart_t* usart, const uint8_t * data, u
   _half_duplex_output(usart);
 
   if (usart->txDMA) {
+    stm32_dma_enable_clock(usart->txDMA);
     LL_DMA_DeInit(usart->txDMA, usart->txDMA_Stream);
 
     LL_DMA_InitTypeDef dmaInit;

diff --git a/radio/src/targets/horus/board.cpp b/radio/src/targets/horus/board.cpp
@@ -101,9 +101,6 @@ void boardInit()
                          AUDIO_RCC_AHB1Periph |
                          KEYS_RCC_AHB1Periph |
                          ADC_RCC_AHB1Periph |
-#if defined(RADIO_FAMILY_T16)
-                         FLYSKY_HALL_RCC_AHB1Periph |
-#endif
                          AUX_SERIAL_RCC_AHB1Periph |
                          AUX2_SERIAL_RCC_AHB1Periph |
                          TELEMETRY_RCC_AHB1Periph |
@@ -121,9 +118,6 @@ void boardInit()
                          ADC_RCC_APB1Periph |
                          TIMER_2MHz_RCC_APB1Periph |
                          AUDIO_RCC_APB1Periph |
-#if defined(RADIO_FAMILY_T16)
-                         FLYSKY_HALL_RCC_APB1Periph |
-#endif
                          TELEMETRY_RCC_APB1Periph |
                          AUDIO_RCC_APB1Periph |
                          MIXER_SCHEDULER_TIMER_RCC_APB1Periph |

diff --git a/radio/src/targets/horus/hal.h b/radio/src/targets/horus/hal.h
@@ -854,10 +854,6 @@
   #define FLYSKY_HALL_SERIAL_TX_GPIO_PIN           LL_GPIO_PIN_0  // PA.00
   #define FLYSKY_HALL_SERIAL_RX_GPIO_PIN           LL_GPIO_PIN_1  // PA.01
   #define FLYSKY_HALL_SERIAL_GPIO_AF               LL_GPIO_AF_8
-
-  #define FLYSKY_HALL_RCC_AHB1Periph               RCC_AHB1Periph_DMA1
-  #define FLYSKY_HALL_RCC_APB1Periph               RCC_APB1Periph_UART4
-
   #define FLYSKY_HALL_SERIAL_USART_IRQHandler      UART4_IRQHandler
   #define FLYSKY_HALL_SERIAL_USART_IRQn            UART4_IRQn
   #define FLYSKY_HALL_SERIAL_DMA                   DMA1

diff --git a/radio/src/targets/nv14/board.cpp b/radio/src/targets/nv14/board.cpp
@@ -125,7 +125,6 @@ void delay_self(int count)
                                AUDIO_RCC_AHB1Periph |\
                                HAPTIC_RCC_AHB1Periph |\
                                INTMODULE_RCC_AHB1Periph |\
-                               FLYSKY_HALL_RCC_AHB1Periph |\
                                EXTMODULE_RCC_AHB1Periph\
                               )
 #define RCC_AHB3PeriphMinimum (SDRAM_RCC_AHB3Periph)
@@ -136,7 +135,6 @@ void delay_self(int count)
                               )
 
 #define RCC_APB1PeriphOther   (TELEMETRY_RCC_APB1Periph |\
-                               FLYSKY_HALL_RCC_APB1Periph |\
                                MIXER_SCHEDULER_TIMER_RCC_APB1Periph \
                               )
 #define RCC_APB2PeriphMinimum (LCD_RCC_APB2Periph)

diff --git a/radio/src/targets/nv14/hal.h b/radio/src/targets/nv14/hal.h
@@ -410,10 +410,6 @@
 #define FLYSKY_HALL_SERIAL_TX_GPIO_PIN           LL_GPIO_PIN_0  // PA.00
 #define FLYSKY_HALL_SERIAL_RX_GPIO_PIN           LL_GPIO_PIN_1  // PA.01
 #define FLYSKY_HALL_SERIAL_GPIO_AF               LL_GPIO_AF_8
-
-#define FLYSKY_HALL_RCC_AHB1Periph               RCC_AHB1Periph_DMA1
-#define FLYSKY_HALL_RCC_APB1Periph               RCC_APB1Periph_UART4
-
 #define FLYSKY_HALL_SERIAL_USART_IRQHandler      UART4_IRQHandler
 #define FLYSKY_HALL_SERIAL_USART_IRQn            UART4_IRQn
 #define FLYSKY_HALL_SERIAL_DMA                   DMA1
Original file line number	Diff line number	Diff line change
Expand Up		@@ -47,3 +47,5 @@ inline static bool stm32_dma_check_tc_flag(DMA_TypeDef* DMAx, uint32_t DMA_Strea

		return true;
		}

		void stm32_dma_enable_clock(DMA_TypeDef* DMAx);