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Loops involving entry block are not properly handled. #6148

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IGI-111 opened this issue Jun 20, 2024 · 1 comment · Fixed by #6177
Closed

Loops involving entry block are not properly handled. #6148

IGI-111 opened this issue Jun 20, 2024 · 1 comment · Fixed by #6177
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audit-report Related to the audit report bug Something isn't working compiler: ir IRgen and sway-ir including optimization passes

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@IGI-111
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IGI-111 commented Jun 20, 2024

  • Dominance frontier analysis may panic if entry block has more than one in edge

  • Infinite loops may occur in simplify_cfg while chaining blocks

  • mem2reg may incorrectly optimize ir and produce code that executes to different results.

@IGI-111 IGI-111 added bug Something isn't working compiler: ir IRgen and sway-ir including optimization passes labels Jun 20, 2024
@ironcev
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ironcev commented Jun 20, 2024

Below are the sample scripts demonstrating the three issues. By the definition of the entry block, it cannot have any predecessors. We are currently not checking that invariant in the IR verifier. It is the lack of that check which actually causes the below three issues because they are based on an invalid IR that is not reported as such.

//Issue 1: dominance frontier
script {
 fn main() -> () {
    entry():
    br block0()

    block0():
    br entry()

    block1():
    br entry()
  }
}

//Issue 2 : simplify-cfg
script {
  fn main() -> bool {
    entry():
    br entry()
}

// Issue 3: mem2reg
script {
  fn main(x: bool) -> u64 {
    local u64 S = const u64 3

    entry(x: bool):
    v0 = get_local ptr u64, S
    v1 = load v0
    cbr x, block0(x, v1), block2(x, v1)

    block0(x: bool, y: u64):
    v0 = get_local ptr u64, S
    v1 = const u64 1
    store v1 to v0
    br block1(x)

    block1(x: bool):
    z = const bool false
    br entry(z)         // <<<----- Branching back to `entry`.

    block2(x: bool, y: u64):
    ret u64 y
  }
}

@IGI-111 IGI-111 added the audit-report Related to the audit report label Jul 30, 2024
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Labels
audit-report Related to the audit report bug Something isn't working compiler: ir IRgen and sway-ir including optimization passes
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