Implemented support for MSR imm. Fixes Apotris

Gericom · Oct 6, 2024 · 8b2c005 · 8b2c005
1 parent 3b5f49a
commit 8b2c005
Show file tree

Hide file tree

Showing 4 changed files with 37 additions and 4 deletions.
diff --git a/code/core/arm9/gbarunner9.ld b/code/core/arm9/gbarunner9.ld
@@ -235,7 +235,6 @@ SECTIONS
 		KEEP (VMUndefinedMsr.o(.itcm))
 		KEEP (JitArmUndefinedBx.o(.itcm))
 		KEEP (JitArmUndefinedLdrPcImm.o(.itcm))
-		KEEP (EmuIrqs.o(.itcm))
 		. = 0x3000;
 		KEEP (ThumbGetRn.o(.itcm))
 		*(.itcm)

diff --git a/code/core/arm9/source/JitPatcher/JitArm.c b/code/core/arm9/source/JitPatcher/JitArm.c
@@ -48,6 +48,14 @@ bool jit_processArmInstruction(u32* ptr)
         // MSR reg
         *ptr = 0x1800090 | (instruction & 0xF04F000F) | ((instruction & 0x02000000) >> 5);
     }
+    else if ((instruction & 0x0FB0F000) == 0x0320F000)
+    {
+        // MSR imm
+        *ptr = 0x1900090
+            | (instruction & 0xF04F000F)
+            | ((instruction & 0x00000FF0) << 4)
+            | ((instruction & 0x02000000) >> 5);
+    }
     else if ((instruction & 0x0FFFFFF0) == 0x012FFF10)
     {
         // BX

diff --git a/code/core/arm9/source/VirtualMachine/VMUndefinedArmTable.cpp b/code/core/arm9/source/VirtualMachine/VMUndefinedArmTable.cpp
@@ -5,6 +5,7 @@
 
 extern const void* vm_armUndefinedMsrRegSpsrRmTable[16];
 extern const void* vm_armUndefinedMsrRegCpsrRmTable[16];
+extern const void* vm_armUndefinedMsrImmTable[16];
 extern const void* vm_armUndefinedMrsSpsrRmTable[16];
 extern const void* vm_armUndefinedMrsCpsrRmTable[16];
 extern const void* jit_armUndefinedBxRmTable[16];
@@ -38,8 +39,7 @@ void vm_initializeUndefinedArmTable()
             // MSR
             if (h == 1)
             {
-                // setTableEntry(index, vm_armUndefinedMsrImm\f)
-                setTableEntry(index, nullptr);
+                setTableEntry(index, vm_armUndefinedMsrImmTable);
             }
             else
             {

diff --git a/code/core/arm9/source/VirtualMachine/VMUndefinedMsr.s b/code/core/arm9/source/VirtualMachine/VMUndefinedMsr.s
@@ -22,6 +22,17 @@
         .endif
 .endm
 
+arm_func vm_armUndefinedMsrImm
+    and r8, lr, #0xF
+    and r10, lr, #0xF00
+    orr r8, r8, r10, lsr #4
+    and r10, lr, #0xF000
+    mov r10, r10, lsr #11
+    mov r8, r8, ror r10
+    tst lr, #0x400000
+    beq vm_updateCpsr
+    b vm_updateSpsr
+
 vm_updateCpsrHiReg:
     ldr r8, [sp, #-4]
 vm_updateCpsr:
@@ -60,7 +71,7 @@ vm_finishCpsrWithFlags:
     orr r10, r10, r8
     msr spsr, r10
     movs pc, lr
-    
+
 vm_finishCpsrOnlyControl:
     adr lr, vm_cpsrFinish
     b emu_updateIrqs
@@ -89,6 +100,15 @@ generate vm_armUndefinedMsrRegCpsrRm, 16
 
 generate vm_armUndefinedMsrRegSpsrRm, 16
 
+arm_func vm_armUndefinedMsrImmSpsr
+    and r8, lr, #0xF
+    and r10, lr, #0xF00
+    orr r8, r8, r10, lsr #4
+    and r10, lr, #0xF000
+    mov r10, r10, lsr #11
+    mov r8, r8, ror r10
+    b vm_updateSpsr
+
 vm_updateSpsrHiReg:
     ldr r8, [r11]
 vm_updateSpsr:
@@ -149,3 +169,9 @@ vm_armUndefinedMsrRegSpsrRmTable:
     .word vm_armUndefinedMsrRegSpsrR13
     .word vm_armUndefinedMsrRegSpsrR14
     .word vm_armUndefinedMsrRegSpsrR15
+
+.global vm_armUndefinedMsrImmTable
+vm_armUndefinedMsrImmTable:
+.rept 16
+    .word vm_armUndefinedMsrImm
+.endr