failure to emit mandatory write barriers for memoryref store in v1.12 (regression)

[vtjnash]

After store atomic ptr %box_Int64, ptr %memory_data release the write barrier code fails to be emitted by the optimizer (it was present after codegen), which is a correctness regression for gc-safety in v1.12 compared to v1.11. Since ijl_box_int64 allocates, it may change memoryref_mem to old, but the optimizer sees store atomic i64 140630014290416, ptr %memoryref_mem.tag_addr unordered and noalias and inaccessiblememonly knows that either of those prove the value cannot change.

julia> code_llvm(raw=true, (NTuple{10,Int},)) do t; x = Memory{Any}(undef, length(t)); for i in eachindex(t); @inbounds x[i] = t[i]; end; x; end                                                                                                                             
; Function Signature: var"#6"(NTuple{10, Int64})                       
;  @ REPL[1]:1 within `#6`                                                                                                                            
define swiftcc nonnull ptr @"julia_#6_934"(ptr nonnull swiftself "gcstack" %pgcstack_arg, ptr nocapture noundef nonnull readonly align 8 dereferenceable(80) %"t::Tuple") local_unnamed_addr #0 !dbg !4 {                                                                                                    
top:                                                                                                                                                  
  %jlcallframe1 = alloca [10 x ptr], align 8                                                                                                          
  %gcframe2 = alloca [12 x ptr], align 16                                
  call void @llvm.memset.p0.i64(ptr align 16 %gcframe2, i8 0, i64 96, i1 true)                                                                        
  store i64 40, ptr %gcframe2, align 8, !tbaa !21                                                                                                     
  %frame.prev = getelementptr inbounds nuw i8, ptr %gcframe2, i64 8                                                                                   
  %task.gcstack = load ptr, ptr %pgcstack_arg, align 8                                                                                                
  store ptr %task.gcstack, ptr %frame.prev, align 8, !tbaa !21           
  store ptr %gcframe2, ptr %pgcstack_arg, align 8                       
  %ptls_field = getelementptr inbounds nuw i8, ptr %pgcstack_arg, i64 16                                                                              
  %ptls_load = load ptr, ptr %ptls_field, align 8, !tbaa !21                                                                                          
  %0 = getelementptr inbounds nuw i8, ptr %ptls_load, i64 16                                                                                          
  %safepoint = load atomic ptr, ptr %0 monotonic, align 8, !tbaa !25, !invariant.load !14                                                             
  fence syncscope("singlethread") seq_cst                                
  %1 = load volatile i64, ptr %safepoint, align 8                                                                                                     
  fence syncscope("singlethread") seq_cst                                                                                                             
    #dbg_declare(ptr %"t::Tuple", !20, !DIExpression(), !27)                                                                                          
; ┌ @ boot.jl:588 within `GenericMemory`                                                                                                              
   %ptls_load230 = load ptr, ptr %ptls_field, align 8, !dbg !28, !tbaa !21
   %memoryref_mem = call noalias nonnull align 8 dereferenceable(112) ptr @ijl_gc_small_alloc(ptr %ptls_load230, i32 648, i32 112, i64 140630014290416) #11, !dbg !28                                                                                                                                        
   %memoryref_mem.tag_addr = getelementptr inbounds i8, ptr %memoryref_mem, i64 -8, !dbg !28                                                          
   store atomic i64 140630014290416, ptr %memoryref_mem.tag_addr unordered, align 8, !dbg !28, !tbaa !32                                              
   %memory_ptr = getelementptr inbounds nuw i8, ptr %memoryref_mem, i64 8, !dbg !28                                                                   
   %memory_data = getelementptr inbounds nuw i8, ptr %memoryref_mem, i64 16, !dbg !28                                                                 
   store ptr %memory_data, ptr %memory_ptr, align 8, !dbg !28, !tbaa !35, !alias.scope !38, !noalias !41                                              
   store i64 10, ptr %memoryref_mem, align 8, !dbg !28, !tbaa !46, !alias.scope !38, !noalias !41                                                     
   call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(80) %memory_data, i8 0, i64 80, i1 false), !dbg !28                      
; └                                                                                                                                                   
; ┌ @ essentials.jl:974 within `setindex!`                                                                                                            
   %.unbox = load i64, ptr %"t::Tuple", align 8, !dbg !48, !tbaa !25, !alias.scope !51, !noalias !52                                                  
   %gc_slot_addr_9 = getelementptr inbounds nuw i8, ptr %gcframe2, i64 88
   store ptr %memoryref_mem, ptr %gc_slot_addr_9, align 8                                                                                             
   %box_Int64 = call nonnull align 8 dereferenceable(8) ptr @ijl_box_int64(i64 signext %.unbox) #13, !dbg !48                                         
   store atomic ptr %box_Int64, ptr %memory_data release, align 8, !dbg !48, !tbaa !53, !alias.scope !55, !noalias !56                                
; └                                                                                                                                                   

[vtjnash]

ah, no, this is not enough because we don't have zero initialized memory from gc_alloc_obj, we may need to penalize codegen much more forcefully

julia> code_llvm(optimize=false, (UInt32,)) do x; Core.svec(x); end
; Function Signature: var"#11"(UInt32)
;  @ REPL[3]:1 within `#11`
define nonnull ptr @"julia_#11_2005"(i32 zeroext %"x::UInt32") #0 {
top:
  %pgcstack = call ptr @julia.get_pgcstack()
  %current_task = getelementptr inbounds i8, ptr %pgcstack, i32 -152
  %0 = call noalias nonnull align 8 dereferenceable(16) ptr @julia.gc_alloc_obj(ptr %current_task, i64 16, ptr inttoptr (i64 144 to ptr)) #6
  store i64 1, ptr %0, align 8
  %1 = getelementptr inbounds i8, ptr %0, i32 8
  call void @llvm.memset.p0.i64(ptr align 8 %1, i8 0, i64 8, i1 false)
  %box_UInt32 = call nonnull align 8 dereferenceable(4) ptr @ijl_box_uint32(i32 zeroext %"x::UInt32") #3
  %2 = getelementptr inbounds i8, ptr %0, i32 8
  store ptr %box_UInt32, ptr %2, align 8
  call void (ptr, ...) @julia.write_barrier(ptr %0, ptr %box_UInt32)
  ret ptr %0
}

julia> code_llvm(optimize=true, (UInt32,)) do x; Core.svec(x); end
; Function Signature: var"#8"(UInt32)
;  @ REPL[2]:1 within `#8`
define nonnull ptr @"julia_#8_1999"(i32 zeroext %"x::UInt32") local_unnamed_addr #0 {
top:
  %gcframe1 = alloca [3 x ptr], align 16
  call void @llvm.memset.p0.i64(ptr align 16 %gcframe1, i8 0, i64 24, i1 true)
  %thread_ptr = call ptr asm "movq %fs:0, $0", "=r"() #10
  %tls_ppgcstack = getelementptr inbounds i8, ptr %thread_ptr, i64 -8
  %tls_pgcstack = load ptr, ptr %tls_ppgcstack, align 8
  store i64 4, ptr %gcframe1, align 8
  %frame.prev = getelementptr inbounds nuw i8, ptr %gcframe1, i64 8
  %task.gcstack = load ptr, ptr %tls_pgcstack, align 8
  store ptr %task.gcstack, ptr %frame.prev, align 8
  store ptr %gcframe1, ptr %tls_pgcstack, align 8
  %ptls_field = getelementptr inbounds nuw i8, ptr %tls_pgcstack, i64 16
  %ptls_load = load ptr, ptr %ptls_field, align 8
  %0 = call noalias nonnull align 8 dereferenceable(32) ptr @ijl_gc_small_alloc(ptr %ptls_load, i32 408, i32 32, i64 144) #6
  %.tag_addr = getelementptr inbounds i8, ptr %0, i64 -8
  store atomic i64 144, ptr %.tag_addr unordered, align 8
  store i64 1, ptr %0, align 8
  %1 = getelementptr inbounds nuw i8, ptr %0, i64 8
  %gc_slot_addr_0 = getelementptr inbounds nuw i8, ptr %gcframe1, i64 16
  store ptr %0, ptr %gc_slot_addr_0, align 8
  %box_UInt32 = call nonnull align 8 dereferenceable(4) ptr @ijl_box_uint32(i32 zeroext %"x::UInt32") #11
  store ptr %box_UInt32, ptr %1, align 8
  %.tag = load atomic volatile i64, ptr %.tag_addr unordered, align 8
  %parent_bits = and i64 %.tag, 3
  %parent_old_marked = icmp eq i64 %parent_bits, 3
  br i1 %parent_old_marked, label %may_trigger_wb, label %2

may_trigger_wb:                                   ; preds = %top
  %box_UInt32.tag_addr = getelementptr inbounds i8, ptr %box_UInt32, i64 -8
  %box_UInt32.tag = load atomic volatile i64, ptr %box_UInt32.tag_addr unordered, align 8
  %child_bit = and i64 %box_UInt32.tag, 1
  %child_not_marked = icmp eq i64 %child_bit, 0
  br i1 %child_not_marked, label %trigger_wb, label %2

trigger_wb:                                       ; preds = %may_trigger_wb
  call void @ijl_gc_queue_root(ptr nonnull %0)
  br label %2

2:                                                ; preds = %trigger_wb, %may_trigger_wb, %top
  %frame.prev6 = load ptr, ptr %frame.prev, align 8
  store ptr %frame.prev6, ptr %tls_pgcstack, align 8
  ret ptr %0
}