Implement false path support

[JulianKemmerer]

Primarily for making large chunks of untimed ~'constant' logic anywhere in the design work with no extra manual registers from the user added.

[JulianKemmerer]

ASYNC_WIRE pragma https://github.com/JulianKemmerer/PipelineC/wiki/Pragmas exists for global wires but only is actually async if separate clock domains - if same clock domain then doesnt actually mark path as async/false...