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Example: DDR3 Memory Buffer UART Loopback

JulianKemmerer edited this page May 30, 2022 · 9 revisions

This is a break down of a UART loopback design example that uses DDR3 memory to buffer messages.

This example is from a series of examples designed for the Arty Board, see those instructions for building the project.

The PipelineC source for this design can be found here. A C test program for exercising the loopback can be found here.

diagram

Source

#include "compiler.h"
#include "wire.h"
#include "../leds/led0_3.c"
#include "../uart/uart_msg_fifos.c"
#include "../ddr3/xil_mig.c"
#include "test.h" // Constants shared with software

// Write stream of messages from uart to DDR3, and once done
// read those same messages back from DDR3 stream out over uart

// State machine that waits for incoming message over uart (async fifos)
// Then writes it to DDR memory at a specific address
typedef enum uart_to_mem_state_t
{
  RESET,
  WAIT_MSG,
  SER_MSG,
}uart_to_mem_state_t;
typedef struct uart_to_mem_t
{
  uint1_t ready;
  xil_app_to_mig_t to_mem;
  uint1_t done; 
}uart_to_mem_t;
uart_to_mem_t uart_to_mem(uint1_t start, test_count_t msg_index, xil_mig_to_app_t from_mem)
{
  // Registers
  static uart_to_mem_state_t state; // FSM state
  static uart_msg_t msg; // Message from uart / memory deserializer buffer
  
  // Outputs
  uart_to_mem_t o;
  o.to_mem = XIL_APP_TO_MIG_T_NULL();
  o.done = 0;
  o.ready = 0;
  
  if(state==RESET)
  {
    o.ready = 1;
    if(start)
    {
      state = WAIT_MSG;
    }
  }
  else if(state==WAIT_MSG)
  {
    // Wait for valid message from uart
    uart_rx_msg_fifo_receiver_t msg_rx = uart_rx_msg_fifo_receiver(1);
    if(msg_rx.done)
    {
      // Then begin serializing it
      msg = msg_rx.msg;
      state = SER_MSG;
    }
  }
  else if(state==SER_MSG)
  {
    // Begin ddr serializer 
    xil_mig_addr_t byte_addr = msg_index * UART_MSG_SIZE; // TODO shifts?
    mig_write_256_t ser = mig_write_256(1, byte_addr, msg.data, from_mem);
    o.to_mem = ser.to_mem;
    msg.data = ser.data;
    // Wait until serializer done
    if(ser.done)
    {
      // Then all the way done, back to start
      o.done = 1;
      state = RESET;
    }
  }
  
  return o;
}

// State machine controlling memory to read a message from a specific address
// and then waits for the message to be outgoing over uart (async fifo)
typedef enum mem_to_uart_state_t
{
  RESET,
  DESER_MSG,
  WAIT_MSG
}mem_to_uart_state_t;
typedef struct mem_to_uart_t
{
  uint1_t ready;
  xil_app_to_mig_t to_mem;
  uint1_t done; 
}mem_to_uart_t;
mem_to_uart_t mem_to_uart(uint1_t start, test_count_t msg_index, xil_mig_to_app_t from_mem)
{
  // Registers
  static mem_to_uart_state_t state; // FSM state
  static uart_msg_t msg; // Message from memory deserializer buffer / into uar
  
  // Drive leds
  WIRE_WRITE(uint1_t, led1, state==WAIT_MSG)
  
  // Outputs
  mem_to_uart_t o;
  o.to_mem = XIL_APP_TO_MIG_T_NULL();
  o.done = 0;
  o.ready = 0;
  
  if(state==RESET)
  {
    o.ready = 1;
    if(start)
    {
      state = DESER_MSG;
    }
  }
  else if(state==DESER_MSG)
  {
    // Begin ddr deserializer 
    xil_mig_addr_t byte_addr = msg_index * UART_MSG_SIZE; // TODO shifts?
    mig_read_256_t deser = mig_read_256(1, byte_addr, msg.data, from_mem);
    msg.data = deser.data;
    o.to_mem = deser.to_mem;
    // Wait until deserializer done and we have full message
    if(deser.done)
    {
      // Then wait until message goes out over uart
      state = WAIT_MSG;
    }
  }
  else if(state==WAIT_MSG)
  {
    // Begin trying to send msg out
    uart_tx_msg_fifo_sender_t msg_tx = uart_tx_msg_fifo_sender(1, msg);
    // Wait for message to go out over uart
    if(msg_tx.done)
    {
      // Then all the way done, back to start
      o.done = 1;
      state = RESET;
    }
  }
  
  return o;
}

// Uses above state machines to transfer messages to/from DDR memory
typedef enum msg_ctrl_state_t
{
  WAIT_RESET,
  UART_TO_MEM, // N messages into memory
  MEM_TO_UART // N messages out of memory
}msg_ctrl_state_t;
// The main process, same clock as generated memory interface
#pragma MAIN_MHZ app xil_mig_module
void app()
{
  // Input port: read outputs wires from memory controller
  xil_mig_to_app_t from_mem;
  WIRE_READ(xil_mig_to_app_t, from_mem, xil_mig_to_app)
  
  // Output port wire: into memory controller
  xil_app_to_mig_t to_mem = XIL_APP_TO_MIG_T_NULL();
  
  // Registers
  static msg_ctrl_state_t state;
  static test_count_t num_msgs;
  
  // Drive leds
  WIRE_WRITE(uint1_t, led0, state==MEM_TO_UART)

  // MEM CTRL FSM
  if(state==WAIT_RESET)
  {
    // Wait for DDR reset to be done
    uint1_t mem_rst_done = !from_mem.ui_clk_sync_rst & from_mem.init_calib_complete;
    if(mem_rst_done)
    {
      // Start things with writes first
      state = UART_TO_MEM;
    }
    num_msgs = 0;
  }
  else if(state==UART_TO_MEM)
  {
    // Keep starting the uart_to_mem fsm until N messages have been written to mem
    uart_to_mem_t writer = uart_to_mem(1, num_msgs, from_mem);
    to_mem = writer.to_mem;   
    if(writer.done)
    {
      // next message ?
      if(num_msgs<(NUM_MSGS_TEST-1))
      {
        // Do next message
        num_msgs += 1;
      }
      else
      {
        // Done writing messages, onto reads
        state = MEM_TO_UART;
        num_msgs = 0;
      }
    }
  }
  else if(state==MEM_TO_UART)
  {
    // Keep starting the mem_to_uart fsm until N messages have been read from mem
    mem_to_uart_t reader = mem_to_uart(1, num_msgs, from_mem);
    to_mem = reader.to_mem;
    if(reader.done)
    {
      // next message ?
      if(num_msgs<(NUM_MSGS_TEST-1))
      {
        // Do next message
        num_msgs += 1;
      }
      else
      {
        // Done read messages, repeat from reset
        state = WAIT_RESET;
      }
    }
  }
 
  // Resets
  if(from_mem.ui_clk_sync_rst)
  {
    state = WAIT_RESET;
  }
   
  // Drive wires into memory controller
  WIRE_WRITE(xil_app_to_mig_t, xil_app_to_mig, to_mem)  
}

PipelineC Tool Output

Pipeline Map

The compiler produces a text representation of what operations occur at which point during during each function's pipeline (i.e. how long each operation takes and when). Inputs flow from top to bottom. Functions listed on the same lines are occurring in parallel.

uart_to_mem
Pipeline Map:
0: ['BIN_OP_EQ[app_c_l37_c6_4afc]', 'BIN_OP_EQ[app_c_l45_c11_d471]', 'BIN_OP_EQ[app_c_l56_c11_c081]', 'state_MUX[app_c_l40_c5_4d15]']
1: ['BIN_OP_EQ[app_c_l37_c6_4afc]', 'BIN_OP_EQ[app_c_l45_c11_d471]', 'BIN_OP_EQ[app_c_l56_c11_c081]', 'state_MUX[app_c_l40_c5_4d15]']
2: ['BIN_OP_EQ[app_c_l37_c6_4afc]', 'BIN_OP_EQ[app_c_l45_c11_d471]', 'BIN_OP_EQ[app_c_l56_c11_c081]', 'state_MUX[app_c_l40_c5_4d15]']
3: ['BIN_OP_EQ[app_c_l37_c6_4afc]', 'BIN_OP_EQ[app_c_l45_c11_d471]', 'BIN_OP_EQ[app_c_l56_c11_c081]', 'state_MUX[app_c_l40_c5_4d15]']
4: ['BIN_OP_EQ[app_c_l37_c6_4afc]', 'BIN_OP_EQ[app_c_l45_c11_d471]', 'BIN_OP_EQ[app_c_l56_c11_c081]', 'state_MUX[app_c_l40_c5_4d15]']
5: ['BIN_OP_EQ[app_c_l37_c6_4afc]', 'BIN_OP_EQ[app_c_l45_c11_d471]', 'BIN_OP_EQ[app_c_l56_c11_c081]', 'state_MUX[app_c_l40_c5_4d15]']
6: ['BIN_OP_EQ[app_c_l37_c6_4afc]', 'BIN_OP_EQ[app_c_l45_c11_d471]', 'BIN_OP_EQ[app_c_l56_c11_c081]', 'state_MUX[app_c_l40_c5_4d15]']
7: ['BIN_OP_EQ[app_c_l37_c6_4afc]', 'BIN_OP_EQ[app_c_l45_c11_d471]', 'BIN_OP_EQ[app_c_l56_c11_c081]', 'state_MUX[app_c_l40_c5_4d15]']
8: ['BIN_OP_EQ[app_c_l37_c6_4afc]', 'BIN_OP_EQ[app_c_l45_c11_d471]', 'BIN_OP_EQ[app_c_l56_c11_c081]', 'state_MUX[app_c_l40_c5_4d15]']
9: ['BIN_OP_EQ[app_c_l37_c6_4afc]', 'BIN_OP_EQ[app_c_l45_c11_d471]', 'BIN_OP_EQ[app_c_l56_c11_c081]', 'state_MUX[app_c_l40_c5_4d15]']
10: ['BIN_OP_EQ[app_c_l37_c6_4afc]', 'BIN_OP_EQ[app_c_l45_c11_d471]', 'BIN_OP_EQ[app_c_l56_c11_c081]', 'state_MUX[app_c_l40_c5_4d15]']
11: ['BIN_OP_EQ[app_c_l37_c6_4afc]', 'BIN_OP_EQ[app_c_l45_c11_d471]', 'BIN_OP_EQ[app_c_l56_c11_c081]', 'state_MUX[app_c_l40_c5_4d15]']
12: ['BIN_OP_EQ[app_c_l37_c6_4afc]', 'BIN_OP_EQ[app_c_l45_c11_d471]', 'BIN_OP_EQ[app_c_l56_c11_c081]', 'state_MUX[app_c_l40_c5_4d15]']
13: ['BIN_OP_EQ[app_c_l37_c6_4afc]', 'BIN_OP_EQ[app_c_l45_c11_d471]', 'BIN_OP_EQ[app_c_l56_c11_c081]', 'state_MUX[app_c_l40_c5_4d15]']
14: ['BIN_OP_EQ[app_c_l37_c6_4afc]', 'BIN_OP_EQ[app_c_l45_c11_d471]', 'BIN_OP_EQ[app_c_l56_c11_c081]', 'state_MUX[app_c_l40_c5_4d15]']
15: ['BIN_OP_EQ[app_c_l37_c6_4afc]', 'BIN_OP_EQ[app_c_l45_c11_d471]', 'BIN_OP_EQ[app_c_l56_c11_c081]', 'state_MUX[app_c_l40_c5_4d15]']
16: ['FALSE_CLOCK_ENABLE_MUX[app_c_l45_c8_45a6]']
17: ['FALSE_CLOCK_ENABLE_MUX[app_c_l45_c8_45a6]']
18: ['FALSE_CLOCK_ENABLE_MUX[app_c_l45_c8_45a6]']
19: ['FALSE_CLOCK_ENABLE_MUX[app_c_l45_c8_45a6]']
20: ['FALSE_CLOCK_ENABLE_MUX[app_c_l45_c8_45a6]']
21: ['FALSE_CLOCK_ENABLE_MUX[app_c_l45_c8_45a6]']
22: ['FALSE_CLOCK_ENABLE_MUX[app_c_l45_c8_45a6]']
23: ['FALSE_CLOCK_ENABLE_MUX[app_c_l45_c8_45a6]']
24: ['FALSE_CLOCK_ENABLE_MUX[app_c_l45_c8_45a6]']
25: ['FALSE_CLOCK_ENABLE_MUX[app_c_l45_c8_45a6]']
26: ['FALSE_CLOCK_ENABLE_MUX[app_c_l45_c8_45a6]']
27: ['FALSE_CLOCK_ENABLE_MUX[app_c_l45_c8_45a6]']
28: ['FALSE_CLOCK_ENABLE_MUX[app_c_l45_c8_45a6]']
29: ['FALSE_CLOCK_ENABLE_MUX[app_c_l45_c8_45a6]']
30: ['FALSE_CLOCK_ENABLE_MUX[app_c_l45_c8_45a6]']
31: ['FALSE_CLOCK_ENABLE_MUX[app_c_l45_c8_45a6]']
32: ['FALSE_CLOCK_ENABLE_MUX[app_c_l56_c8_5677]', 'TRUE_CLOCK_ENABLE_MUX[app_c_l46_c1_ed7f]']
33: ['FALSE_CLOCK_ENABLE_MUX[app_c_l56_c8_5677]', 'TRUE_CLOCK_ENABLE_MUX[app_c_l46_c1_ed7f]']
34: ['FALSE_CLOCK_ENABLE_MUX[app_c_l56_c8_5677]', 'TRUE_CLOCK_ENABLE_MUX[app_c_l46_c1_ed7f]']
35: ['FALSE_CLOCK_ENABLE_MUX[app_c_l56_c8_5677]', 'TRUE_CLOCK_ENABLE_MUX[app_c_l46_c1_ed7f]']
36: ['FALSE_CLOCK_ENABLE_MUX[app_c_l56_c8_5677]', 'TRUE_CLOCK_ENABLE_MUX[app_c_l46_c1_ed7f]']
37: ['FALSE_CLOCK_ENABLE_MUX[app_c_l56_c8_5677]', 'TRUE_CLOCK_ENABLE_MUX[app_c_l46_c1_ed7f]']
38: ['FALSE_CLOCK_ENABLE_MUX[app_c_l56_c8_5677]', 'TRUE_CLOCK_ENABLE_MUX[app_c_l46_c1_ed7f]']
39: ['FALSE_CLOCK_ENABLE_MUX[app_c_l56_c8_5677]', 'TRUE_CLOCK_ENABLE_MUX[app_c_l46_c1_ed7f]']
40: ['FALSE_CLOCK_ENABLE_MUX[app_c_l56_c8_5677]', 'TRUE_CLOCK_ENABLE_MUX[app_c_l46_c1_ed7f]']
41: ['FALSE_CLOCK_ENABLE_MUX[app_c_l56_c8_5677]', 'TRUE_CLOCK_ENABLE_MUX[app_c_l46_c1_ed7f]']
42: ['FALSE_CLOCK_ENABLE_MUX[app_c_l56_c8_5677]', 'TRUE_CLOCK_ENABLE_MUX[app_c_l46_c1_ed7f]']
43: ['FALSE_CLOCK_ENABLE_MUX[app_c_l56_c8_5677]', 'TRUE_CLOCK_ENABLE_MUX[app_c_l46_c1_ed7f]']
44: ['FALSE_CLOCK_ENABLE_MUX[app_c_l56_c8_5677]', 'TRUE_CLOCK_ENABLE_MUX[app_c_l46_c1_ed7f]']
45: ['FALSE_CLOCK_ENABLE_MUX[app_c_l56_c8_5677]', 'TRUE_CLOCK_ENABLE_MUX[app_c_l46_c1_ed7f]']
46: ['FALSE_CLOCK_ENABLE_MUX[app_c_l56_c8_5677]', 'TRUE_CLOCK_ENABLE_MUX[app_c_l46_c1_ed7f]']
47: ['FALSE_CLOCK_ENABLE_MUX[app_c_l56_c8_5677]', 'TRUE_CLOCK_ENABLE_MUX[app_c_l46_c1_ed7f]']
48: ['TRUE_CLOCK_ENABLE_MUX[app_c_l57_c1_a3d0]', 'uart_rx_msg_fifo_receiver[app_c_l48_c42_b247]']
49: ['TRUE_CLOCK_ENABLE_MUX[app_c_l57_c1_a3d0]', 'uart_rx_msg_fifo_receiver[app_c_l48_c42_b247]']
50: ['TRUE_CLOCK_ENABLE_MUX[app_c_l57_c1_a3d0]', 'uart_rx_msg_fifo_receiver[app_c_l48_c42_b247]']
51: ['TRUE_CLOCK_ENABLE_MUX[app_c_l57_c1_a3d0]', 'uart_rx_msg_fifo_receiver[app_c_l48_c42_b247]']
52: ['TRUE_CLOCK_ENABLE_MUX[app_c_l57_c1_a3d0]', 'uart_rx_msg_fifo_receiver[app_c_l48_c42_b247]']
53: ['TRUE_CLOCK_ENABLE_MUX[app_c_l57_c1_a3d0]', 'uart_rx_msg_fifo_receiver[app_c_l48_c42_b247]']
54: ['TRUE_CLOCK_ENABLE_MUX[app_c_l57_c1_a3d0]', 'uart_rx_msg_fifo_receiver[app_c_l48_c42_b247]']
55: ['TRUE_CLOCK_ENABLE_MUX[app_c_l57_c1_a3d0]', 'uart_rx_msg_fifo_receiver[app_c_l48_c42_b247]']
56: ['TRUE_CLOCK_ENABLE_MUX[app_c_l57_c1_a3d0]', 'uart_rx_msg_fifo_receiver[app_c_l48_c42_b247]']
57: ['TRUE_CLOCK_ENABLE_MUX[app_c_l57_c1_a3d0]', 'uart_rx_msg_fifo_receiver[app_c_l48_c42_b247]']
58: ['TRUE_CLOCK_ENABLE_MUX[app_c_l57_c1_a3d0]', 'uart_rx_msg_fifo_receiver[app_c_l48_c42_b247]']
59: ['TRUE_CLOCK_ENABLE_MUX[app_c_l57_c1_a3d0]', 'uart_rx_msg_fifo_receiver[app_c_l48_c42_b247]']
60: ['TRUE_CLOCK_ENABLE_MUX[app_c_l57_c1_a3d0]', 'uart_rx_msg_fifo_receiver[app_c_l48_c42_b247]']
61: ['TRUE_CLOCK_ENABLE_MUX[app_c_l57_c1_a3d0]', 'uart_rx_msg_fifo_receiver[app_c_l48_c42_b247]']
62: ['TRUE_CLOCK_ENABLE_MUX[app_c_l57_c1_a3d0]', 'uart_rx_msg_fifo_receiver[app_c_l48_c42_b247]']
63: ['TRUE_CLOCK_ENABLE_MUX[app_c_l57_c1_a3d0]', 'uart_rx_msg_fifo_receiver[app_c_l48_c42_b247]']
64: ['mig_write_256[app_c_l60_c27_61f4]', 'msg_MUX[app_c_l49_c5_e7c1]', 'state_MUX[app_c_l49_c5_e7c1]']
65: ['mig_write_256[app_c_l60_c27_61f4]', 'msg_MUX[app_c_l49_c5_e7c1]', 'state_MUX[app_c_l49_c5_e7c1]']
66: ['mig_write_256[app_c_l60_c27_61f4]', 'msg_MUX[app_c_l49_c5_e7c1]', 'state_MUX[app_c_l49_c5_e7c1]']
67: ['mig_write_256[app_c_l60_c27_61f4]', 'msg_MUX[app_c_l49_c5_e7c1]', 'state_MUX[app_c_l49_c5_e7c1]']
68: ['mig_write_256[app_c_l60_c27_61f4]', 'msg_MUX[app_c_l49_c5_e7c1]', 'state_MUX[app_c_l49_c5_e7c1]']
69: ['mig_write_256[app_c_l60_c27_61f4]', 'msg_MUX[app_c_l49_c5_e7c1]', 'state_MUX[app_c_l49_c5_e7c1]']
70: ['mig_write_256[app_c_l60_c27_61f4]', 'msg_MUX[app_c_l49_c5_e7c1]', 'state_MUX[app_c_l49_c5_e7c1]']
71: ['mig_write_256[app_c_l60_c27_61f4]', 'msg_MUX[app_c_l49_c5_e7c1]', 'state_MUX[app_c_l49_c5_e7c1]']
72: ['mig_write_256[app_c_l60_c27_61f4]', 'msg_MUX[app_c_l49_c5_e7c1]', 'state_MUX[app_c_l49_c5_e7c1]']
73: ['mig_write_256[app_c_l60_c27_61f4]', 'msg_MUX[app_c_l49_c5_e7c1]', 'state_MUX[app_c_l49_c5_e7c1]']
74: ['mig_write_256[app_c_l60_c27_61f4]', 'msg_MUX[app_c_l49_c5_e7c1]', 'state_MUX[app_c_l49_c5_e7c1]']
75: ['mig_write_256[app_c_l60_c27_61f4]', 'msg_MUX[app_c_l49_c5_e7c1]', 'state_MUX[app_c_l49_c5_e7c1]']
76: ['mig_write_256[app_c_l60_c27_61f4]', 'msg_MUX[app_c_l49_c5_e7c1]', 'state_MUX[app_c_l49_c5_e7c1]']
77: ['mig_write_256[app_c_l60_c27_61f4]', 'msg_MUX[app_c_l49_c5_e7c1]', 'state_MUX[app_c_l49_c5_e7c1]']
78: ['mig_write_256[app_c_l60_c27_61f4]', 'msg_MUX[app_c_l49_c5_e7c1]', 'state_MUX[app_c_l49_c5_e7c1]']
79: ['mig_write_256[app_c_l60_c27_61f4]', 'msg_MUX[app_c_l49_c5_e7c1]', 'state_MUX[app_c_l49_c5_e7c1]']
80: ['mig_write_256[app_c_l60_c27_61f4]']
81: ['mig_write_256[app_c_l60_c27_61f4]']
82: ['mig_write_256[app_c_l60_c27_61f4]']
83: ['mig_write_256[app_c_l60_c27_61f4]']
84: ['mig_write_256[app_c_l60_c27_61f4]']
85: ['mig_write_256[app_c_l60_c27_61f4]']
86: ['mig_write_256[app_c_l60_c27_61f4]']
87: ['mig_write_256[app_c_l60_c27_61f4]']
88: ['mig_write_256[app_c_l60_c27_61f4]']
89: ['mig_write_256[app_c_l60_c27_61f4]']
90: ['mig_write_256[app_c_l60_c27_61f4]']
91: ['mig_write_256[app_c_l60_c27_61f4]']
92: ['mig_write_256[app_c_l60_c27_61f4]']
93: ['mig_write_256[app_c_l60_c27_61f4]']
94: ['mig_write_256[app_c_l60_c27_61f4]']
95: ['mig_write_256[app_c_l60_c27_61f4]']
96: ['mig_write_256[app_c_l60_c27_61f4]']
97: ['mig_write_256[app_c_l60_c27_61f4]']
98: ['mig_write_256[app_c_l60_c27_61f4]']
99: ['mig_write_256[app_c_l60_c27_61f4]']
100: ['mig_write_256[app_c_l60_c27_61f4]']
101: ['mig_write_256[app_c_l60_c27_61f4]']
102: ['mig_write_256[app_c_l60_c27_61f4]']
103: ['mig_write_256[app_c_l60_c27_61f4]']
104: ['mig_write_256[app_c_l60_c27_61f4]']
105: ['mig_write_256[app_c_l60_c27_61f4]']
106: ['mig_write_256[app_c_l60_c27_61f4]']
107: ['mig_write_256[app_c_l60_c27_61f4]']
108: ['mig_write_256[app_c_l60_c27_61f4]']
109: ['mig_write_256[app_c_l60_c27_61f4]']
110: ['mig_write_256[app_c_l60_c27_61f4]']
111: ['mig_write_256[app_c_l60_c27_61f4]']
112: ['mig_write_256[app_c_l60_c27_61f4]']
113: ['mig_write_256[app_c_l60_c27_61f4]']
114: ['mig_write_256[app_c_l60_c27_61f4]']
115: ['mig_write_256[app_c_l60_c27_61f4]']
116: ['mig_write_256[app_c_l60_c27_61f4]']
117: ['mig_write_256[app_c_l60_c27_61f4]']
118: ['mig_write_256[app_c_l60_c27_61f4]']
119: ['mig_write_256[app_c_l60_c27_61f4]']
120: ['mig_write_256[app_c_l60_c27_61f4]']
121: ['mig_write_256[app_c_l60_c27_61f4]']
122: ['msg_MUX[app_c_l56_c8_5677]', 'o_done_MUX[app_c_l64_c5_7e8d]', 'o_to_mem_MUX[app_c_l56_c8_5677]', 'state_MUX[app_c_l64_c5_7e8d]']
123: ['msg_MUX[app_c_l56_c8_5677]', 'o_done_MUX[app_c_l64_c5_7e8d]', 'o_to_mem_MUX[app_c_l56_c8_5677]', 'state_MUX[app_c_l64_c5_7e8d]']
124: ['msg_MUX[app_c_l56_c8_5677]', 'o_done_MUX[app_c_l64_c5_7e8d]', 'o_to_mem_MUX[app_c_l56_c8_5677]', 'state_MUX[app_c_l64_c5_7e8d]']
125: ['msg_MUX[app_c_l56_c8_5677]', 'o_done_MUX[app_c_l64_c5_7e8d]', 'o_to_mem_MUX[app_c_l56_c8_5677]', 'state_MUX[app_c_l64_c5_7e8d]']
126: ['msg_MUX[app_c_l56_c8_5677]', 'o_done_MUX[app_c_l64_c5_7e8d]', 'o_to_mem_MUX[app_c_l56_c8_5677]', 'state_MUX[app_c_l64_c5_7e8d]']
127: ['msg_MUX[app_c_l56_c8_5677]', 'o_done_MUX[app_c_l64_c5_7e8d]', 'o_to_mem_MUX[app_c_l56_c8_5677]', 'state_MUX[app_c_l64_c5_7e8d]']
128: ['msg_MUX[app_c_l56_c8_5677]', 'o_done_MUX[app_c_l64_c5_7e8d]', 'o_to_mem_MUX[app_c_l56_c8_5677]', 'state_MUX[app_c_l64_c5_7e8d]']
129: ['msg_MUX[app_c_l56_c8_5677]', 'o_done_MUX[app_c_l64_c5_7e8d]', 'o_to_mem_MUX[app_c_l56_c8_5677]', 'state_MUX[app_c_l64_c5_7e8d]']
130: ['msg_MUX[app_c_l56_c8_5677]', 'o_done_MUX[app_c_l64_c5_7e8d]', 'o_to_mem_MUX[app_c_l56_c8_5677]', 'state_MUX[app_c_l64_c5_7e8d]']
131: ['msg_MUX[app_c_l56_c8_5677]', 'o_done_MUX[app_c_l64_c5_7e8d]', 'o_to_mem_MUX[app_c_l56_c8_5677]', 'state_MUX[app_c_l64_c5_7e8d]']
132: ['msg_MUX[app_c_l56_c8_5677]', 'o_done_MUX[app_c_l64_c5_7e8d]', 'o_to_mem_MUX[app_c_l56_c8_5677]', 'state_MUX[app_c_l64_c5_7e8d]']
133: ['msg_MUX[app_c_l56_c8_5677]', 'o_done_MUX[app_c_l64_c5_7e8d]', 'o_to_mem_MUX[app_c_l56_c8_5677]', 'state_MUX[app_c_l64_c5_7e8d]']
134: ['msg_MUX[app_c_l56_c8_5677]', 'o_done_MUX[app_c_l64_c5_7e8d]', 'o_to_mem_MUX[app_c_l56_c8_5677]', 'state_MUX[app_c_l64_c5_7e8d]']
135: ['msg_MUX[app_c_l56_c8_5677]', 'o_done_MUX[app_c_l64_c5_7e8d]', 'o_to_mem_MUX[app_c_l56_c8_5677]', 'state_MUX[app_c_l64_c5_7e8d]']
136: ['msg_MUX[app_c_l56_c8_5677]', 'o_done_MUX[app_c_l64_c5_7e8d]', 'o_to_mem_MUX[app_c_l56_c8_5677]', 'state_MUX[app_c_l64_c5_7e8d]']
137: ['msg_MUX[app_c_l56_c8_5677]', 'o_done_MUX[app_c_l64_c5_7e8d]', 'o_to_mem_MUX[app_c_l56_c8_5677]', 'state_MUX[app_c_l64_c5_7e8d]']
138: ['msg_MUX[app_c_l45_c8_45a6]', 'o_done_MUX[app_c_l56_c8_5677]', 'o_to_mem_MUX[app_c_l45_c8_45a6]', 'state_MUX[app_c_l56_c8_5677]']
139: ['msg_MUX[app_c_l45_c8_45a6]', 'o_done_MUX[app_c_l56_c8_5677]', 'o_to_mem_MUX[app_c_l45_c8_45a6]', 'state_MUX[app_c_l56_c8_5677]']
140: ['msg_MUX[app_c_l45_c8_45a6]', 'o_done_MUX[app_c_l56_c8_5677]', 'o_to_mem_MUX[app_c_l45_c8_45a6]', 'state_MUX[app_c_l56_c8_5677]']
141: ['msg_MUX[app_c_l45_c8_45a6]', 'o_done_MUX[app_c_l56_c8_5677]', 'o_to_mem_MUX[app_c_l45_c8_45a6]', 'state_MUX[app_c_l56_c8_5677]']
142: ['msg_MUX[app_c_l45_c8_45a6]', 'o_done_MUX[app_c_l56_c8_5677]', 'o_to_mem_MUX[app_c_l45_c8_45a6]', 'state_MUX[app_c_l56_c8_5677]']
143: ['msg_MUX[app_c_l45_c8_45a6]', 'o_done_MUX[app_c_l56_c8_5677]', 'o_to_mem_MUX[app_c_l45_c8_45a6]', 'state_MUX[app_c_l56_c8_5677]']
144: ['msg_MUX[app_c_l45_c8_45a6]', 'o_done_MUX[app_c_l56_c8_5677]', 'o_to_mem_MUX[app_c_l45_c8_45a6]', 'state_MUX[app_c_l56_c8_5677]']
145: ['msg_MUX[app_c_l45_c8_45a6]', 'o_done_MUX[app_c_l56_c8_5677]', 'o_to_mem_MUX[app_c_l45_c8_45a6]', 'state_MUX[app_c_l56_c8_5677]']
146: ['msg_MUX[app_c_l45_c8_45a6]', 'o_done_MUX[app_c_l56_c8_5677]', 'o_to_mem_MUX[app_c_l45_c8_45a6]', 'state_MUX[app_c_l56_c8_5677]']
147: ['msg_MUX[app_c_l45_c8_45a6]', 'o_done_MUX[app_c_l56_c8_5677]', 'o_to_mem_MUX[app_c_l45_c8_45a6]', 'state_MUX[app_c_l56_c8_5677]']
148: ['msg_MUX[app_c_l45_c8_45a6]', 'o_done_MUX[app_c_l56_c8_5677]', 'o_to_mem_MUX[app_c_l45_c8_45a6]', 'state_MUX[app_c_l56_c8_5677]']
149: ['msg_MUX[app_c_l45_c8_45a6]', 'o_done_MUX[app_c_l56_c8_5677]', 'o_to_mem_MUX[app_c_l45_c8_45a6]', 'state_MUX[app_c_l56_c8_5677]']
150: ['msg_MUX[app_c_l45_c8_45a6]', 'o_done_MUX[app_c_l56_c8_5677]', 'o_to_mem_MUX[app_c_l45_c8_45a6]', 'state_MUX[app_c_l56_c8_5677]']
151: ['msg_MUX[app_c_l45_c8_45a6]', 'o_done_MUX[app_c_l56_c8_5677]', 'o_to_mem_MUX[app_c_l45_c8_45a6]', 'state_MUX[app_c_l56_c8_5677]']
152: ['msg_MUX[app_c_l45_c8_45a6]', 'o_done_MUX[app_c_l56_c8_5677]', 'o_to_mem_MUX[app_c_l45_c8_45a6]', 'state_MUX[app_c_l56_c8_5677]']
153: ['msg_MUX[app_c_l45_c8_45a6]', 'o_done_MUX[app_c_l56_c8_5677]', 'o_to_mem_MUX[app_c_l45_c8_45a6]', 'state_MUX[app_c_l56_c8_5677]']
154: ['msg_MUX[app_c_l37_c3_e846]', 'o_done_MUX[app_c_l45_c8_45a6]', 'state_MUX[app_c_l45_c8_45a6]']
155: ['msg_MUX[app_c_l37_c3_e846]', 'o_done_MUX[app_c_l45_c8_45a6]', 'state_MUX[app_c_l45_c8_45a6]']
156: ['msg_MUX[app_c_l37_c3_e846]', 'o_done_MUX[app_c_l45_c8_45a6]', 'state_MUX[app_c_l45_c8_45a6]']
157: ['msg_MUX[app_c_l37_c3_e846]', 'o_done_MUX[app_c_l45_c8_45a6]', 'state_MUX[app_c_l45_c8_45a6]']
158: ['msg_MUX[app_c_l37_c3_e846]', 'o_done_MUX[app_c_l45_c8_45a6]', 'state_MUX[app_c_l45_c8_45a6]']
159: ['msg_MUX[app_c_l37_c3_e846]', 'o_done_MUX[app_c_l45_c8_45a6]', 'state_MUX[app_c_l45_c8_45a6]']
160: ['msg_MUX[app_c_l37_c3_e846]', 'o_done_MUX[app_c_l45_c8_45a6]', 'state_MUX[app_c_l45_c8_45a6]']
161: ['msg_MUX[app_c_l37_c3_e846]', 'o_done_MUX[app_c_l45_c8_45a6]', 'state_MUX[app_c_l45_c8_45a6]']
162: ['msg_MUX[app_c_l37_c3_e846]', 'o_done_MUX[app_c_l45_c8_45a6]', 'state_MUX[app_c_l45_c8_45a6]']
163: ['msg_MUX[app_c_l37_c3_e846]', 'o_done_MUX[app_c_l45_c8_45a6]', 'state_MUX[app_c_l45_c8_45a6]']
164: ['msg_MUX[app_c_l37_c3_e846]', 'o_done_MUX[app_c_l45_c8_45a6]', 'state_MUX[app_c_l45_c8_45a6]']
165: ['msg_MUX[app_c_l37_c3_e846]', 'o_done_MUX[app_c_l45_c8_45a6]', 'state_MUX[app_c_l45_c8_45a6]']
166: ['msg_MUX[app_c_l37_c3_e846]', 'o_done_MUX[app_c_l45_c8_45a6]', 'state_MUX[app_c_l45_c8_45a6]']
167: ['msg_MUX[app_c_l37_c3_e846]', 'o_done_MUX[app_c_l45_c8_45a6]', 'state_MUX[app_c_l45_c8_45a6]']
168: ['msg_MUX[app_c_l37_c3_e846]', 'o_done_MUX[app_c_l45_c8_45a6]', 'state_MUX[app_c_l45_c8_45a6]']
169: ['msg_MUX[app_c_l37_c3_e846]', 'o_done_MUX[app_c_l45_c8_45a6]', 'state_MUX[app_c_l45_c8_45a6]']
170: ['o_MUX[app_c_l37_c3_e846]', 'state_MUX[app_c_l37_c3_e846]']
171: ['o_MUX[app_c_l37_c3_e846]', 'state_MUX[app_c_l37_c3_e846]']
172: ['o_MUX[app_c_l37_c3_e846]', 'state_MUX[app_c_l37_c3_e846]']
173: ['o_MUX[app_c_l37_c3_e846]', 'state_MUX[app_c_l37_c3_e846]']
174: ['o_MUX[app_c_l37_c3_e846]', 'state_MUX[app_c_l37_c3_e846]']
175: ['o_MUX[app_c_l37_c3_e846]', 'state_MUX[app_c_l37_c3_e846]']
176: ['o_MUX[app_c_l37_c3_e846]', 'state_MUX[app_c_l37_c3_e846]']
177: ['o_MUX[app_c_l37_c3_e846]', 'state_MUX[app_c_l37_c3_e846]']
178: ['o_MUX[app_c_l37_c3_e846]', 'state_MUX[app_c_l37_c3_e846]']
179: ['o_MUX[app_c_l37_c3_e846]', 'state_MUX[app_c_l37_c3_e846]']
180: ['o_MUX[app_c_l37_c3_e846]', 'state_MUX[app_c_l37_c3_e846]']
181: ['o_MUX[app_c_l37_c3_e846]', 'state_MUX[app_c_l37_c3_e846]']
182: ['o_MUX[app_c_l37_c3_e846]', 'state_MUX[app_c_l37_c3_e846]']
183: ['o_MUX[app_c_l37_c3_e846]', 'state_MUX[app_c_l37_c3_e846]']
184: ['o_MUX[app_c_l37_c3_e846]', 'state_MUX[app_c_l37_c3_e846]']
185: ['o_MUX[app_c_l37_c3_e846]', 'state_MUX[app_c_l37_c3_e846]']

mem_to_uart
Pipeline Map:
0: ['BIN_OP_EQ[app_c_l104_c6_4afc]', 'BIN_OP_EQ[app_c_l112_c11_c101]', 'BIN_OP_EQ[app_c_l126_c11_d471]', 'BIN_OP_EQ[app_c_l96_c86_d471]', 'state_MUX[app_c_l107_c5_a183]']
1: ['BIN_OP_EQ[app_c_l104_c6_4afc]', 'BIN_OP_EQ[app_c_l112_c11_c101]', 'BIN_OP_EQ[app_c_l126_c11_d471]', 'BIN_OP_EQ[app_c_l96_c86_d471]', 'state_MUX[app_c_l107_c5_a183]']
2: ['BIN_OP_EQ[app_c_l104_c6_4afc]', 'BIN_OP_EQ[app_c_l112_c11_c101]', 'BIN_OP_EQ[app_c_l126_c11_d471]', 'BIN_OP_EQ[app_c_l96_c86_d471]', 'state_MUX[app_c_l107_c5_a183]']
3: ['BIN_OP_EQ[app_c_l104_c6_4afc]', 'BIN_OP_EQ[app_c_l112_c11_c101]', 'BIN_OP_EQ[app_c_l126_c11_d471]', 'BIN_OP_EQ[app_c_l96_c86_d471]', 'state_MUX[app_c_l107_c5_a183]']
4: ['BIN_OP_EQ[app_c_l104_c6_4afc]', 'BIN_OP_EQ[app_c_l112_c11_c101]', 'BIN_OP_EQ[app_c_l126_c11_d471]', 'BIN_OP_EQ[app_c_l96_c86_d471]', 'state_MUX[app_c_l107_c5_a183]']
5: ['BIN_OP_EQ[app_c_l104_c6_4afc]', 'BIN_OP_EQ[app_c_l112_c11_c101]', 'BIN_OP_EQ[app_c_l126_c11_d471]', 'BIN_OP_EQ[app_c_l96_c86_d471]', 'state_MUX[app_c_l107_c5_a183]']
6: ['BIN_OP_EQ[app_c_l104_c6_4afc]', 'BIN_OP_EQ[app_c_l112_c11_c101]', 'BIN_OP_EQ[app_c_l126_c11_d471]', 'BIN_OP_EQ[app_c_l96_c86_d471]', 'state_MUX[app_c_l107_c5_a183]']
7: ['BIN_OP_EQ[app_c_l104_c6_4afc]', 'BIN_OP_EQ[app_c_l112_c11_c101]', 'BIN_OP_EQ[app_c_l126_c11_d471]', 'BIN_OP_EQ[app_c_l96_c86_d471]', 'state_MUX[app_c_l107_c5_a183]']
8: ['BIN_OP_EQ[app_c_l104_c6_4afc]', 'BIN_OP_EQ[app_c_l112_c11_c101]', 'BIN_OP_EQ[app_c_l126_c11_d471]', 'BIN_OP_EQ[app_c_l96_c86_d471]', 'state_MUX[app_c_l107_c5_a183]']
9: ['BIN_OP_EQ[app_c_l104_c6_4afc]', 'BIN_OP_EQ[app_c_l112_c11_c101]', 'BIN_OP_EQ[app_c_l126_c11_d471]', 'BIN_OP_EQ[app_c_l96_c86_d471]', 'state_MUX[app_c_l107_c5_a183]']
10: ['BIN_OP_EQ[app_c_l104_c6_4afc]', 'BIN_OP_EQ[app_c_l112_c11_c101]', 'BIN_OP_EQ[app_c_l126_c11_d471]', 'BIN_OP_EQ[app_c_l96_c86_d471]', 'state_MUX[app_c_l107_c5_a183]']
11: ['BIN_OP_EQ[app_c_l104_c6_4afc]', 'BIN_OP_EQ[app_c_l112_c11_c101]', 'BIN_OP_EQ[app_c_l126_c11_d471]', 'BIN_OP_EQ[app_c_l96_c86_d471]', 'state_MUX[app_c_l107_c5_a183]']
12: ['BIN_OP_EQ[app_c_l104_c6_4afc]', 'BIN_OP_EQ[app_c_l112_c11_c101]', 'BIN_OP_EQ[app_c_l126_c11_d471]', 'BIN_OP_EQ[app_c_l96_c86_d471]', 'state_MUX[app_c_l107_c5_a183]']
13: ['BIN_OP_EQ[app_c_l104_c6_4afc]', 'BIN_OP_EQ[app_c_l112_c11_c101]', 'BIN_OP_EQ[app_c_l126_c11_d471]', 'BIN_OP_EQ[app_c_l96_c86_d471]', 'state_MUX[app_c_l107_c5_a183]']
14: ['BIN_OP_EQ[app_c_l104_c6_4afc]', 'BIN_OP_EQ[app_c_l112_c11_c101]', 'BIN_OP_EQ[app_c_l126_c11_d471]', 'BIN_OP_EQ[app_c_l96_c86_d471]', 'state_MUX[app_c_l107_c5_a183]']
15: ['BIN_OP_EQ[app_c_l104_c6_4afc]', 'BIN_OP_EQ[app_c_l112_c11_c101]', 'BIN_OP_EQ[app_c_l126_c11_d471]', 'BIN_OP_EQ[app_c_l96_c86_d471]', 'state_MUX[app_c_l107_c5_a183]']
16: ['FALSE_CLOCK_ENABLE_MUX[app_c_l112_c8_2503]']
17: ['FALSE_CLOCK_ENABLE_MUX[app_c_l112_c8_2503]']
18: ['FALSE_CLOCK_ENABLE_MUX[app_c_l112_c8_2503]']
19: ['FALSE_CLOCK_ENABLE_MUX[app_c_l112_c8_2503]']
20: ['FALSE_CLOCK_ENABLE_MUX[app_c_l112_c8_2503]']
21: ['FALSE_CLOCK_ENABLE_MUX[app_c_l112_c8_2503]']
22: ['FALSE_CLOCK_ENABLE_MUX[app_c_l112_c8_2503]']
23: ['FALSE_CLOCK_ENABLE_MUX[app_c_l112_c8_2503]']
24: ['FALSE_CLOCK_ENABLE_MUX[app_c_l112_c8_2503]']
25: ['FALSE_CLOCK_ENABLE_MUX[app_c_l112_c8_2503]']
26: ['FALSE_CLOCK_ENABLE_MUX[app_c_l112_c8_2503]']
27: ['FALSE_CLOCK_ENABLE_MUX[app_c_l112_c8_2503]']
28: ['FALSE_CLOCK_ENABLE_MUX[app_c_l112_c8_2503]']
29: ['FALSE_CLOCK_ENABLE_MUX[app_c_l112_c8_2503]']
30: ['FALSE_CLOCK_ENABLE_MUX[app_c_l112_c8_2503]']
31: ['FALSE_CLOCK_ENABLE_MUX[app_c_l112_c8_2503]']
32: ['FALSE_CLOCK_ENABLE_MUX[app_c_l126_c8_057b]', 'TRUE_CLOCK_ENABLE_MUX[app_c_l113_c1_5efb]']
33: ['FALSE_CLOCK_ENABLE_MUX[app_c_l126_c8_057b]', 'TRUE_CLOCK_ENABLE_MUX[app_c_l113_c1_5efb]']
34: ['FALSE_CLOCK_ENABLE_MUX[app_c_l126_c8_057b]', 'TRUE_CLOCK_ENABLE_MUX[app_c_l113_c1_5efb]']
35: ['FALSE_CLOCK_ENABLE_MUX[app_c_l126_c8_057b]', 'TRUE_CLOCK_ENABLE_MUX[app_c_l113_c1_5efb]']
36: ['FALSE_CLOCK_ENABLE_MUX[app_c_l126_c8_057b]', 'TRUE_CLOCK_ENABLE_MUX[app_c_l113_c1_5efb]']
37: ['FALSE_CLOCK_ENABLE_MUX[app_c_l126_c8_057b]', 'TRUE_CLOCK_ENABLE_MUX[app_c_l113_c1_5efb]']
38: ['FALSE_CLOCK_ENABLE_MUX[app_c_l126_c8_057b]', 'TRUE_CLOCK_ENABLE_MUX[app_c_l113_c1_5efb]']
39: ['FALSE_CLOCK_ENABLE_MUX[app_c_l126_c8_057b]', 'TRUE_CLOCK_ENABLE_MUX[app_c_l113_c1_5efb]']
40: ['FALSE_CLOCK_ENABLE_MUX[app_c_l126_c8_057b]', 'TRUE_CLOCK_ENABLE_MUX[app_c_l113_c1_5efb]']
41: ['FALSE_CLOCK_ENABLE_MUX[app_c_l126_c8_057b]', 'TRUE_CLOCK_ENABLE_MUX[app_c_l113_c1_5efb]']
42: ['FALSE_CLOCK_ENABLE_MUX[app_c_l126_c8_057b]', 'TRUE_CLOCK_ENABLE_MUX[app_c_l113_c1_5efb]']
43: ['FALSE_CLOCK_ENABLE_MUX[app_c_l126_c8_057b]', 'TRUE_CLOCK_ENABLE_MUX[app_c_l113_c1_5efb]']
44: ['FALSE_CLOCK_ENABLE_MUX[app_c_l126_c8_057b]', 'TRUE_CLOCK_ENABLE_MUX[app_c_l113_c1_5efb]']
45: ['FALSE_CLOCK_ENABLE_MUX[app_c_l126_c8_057b]', 'TRUE_CLOCK_ENABLE_MUX[app_c_l113_c1_5efb]']
46: ['FALSE_CLOCK_ENABLE_MUX[app_c_l126_c8_057b]', 'TRUE_CLOCK_ENABLE_MUX[app_c_l113_c1_5efb]']
47: ['FALSE_CLOCK_ENABLE_MUX[app_c_l126_c8_057b]', 'TRUE_CLOCK_ENABLE_MUX[app_c_l113_c1_5efb]']
48: ['TRUE_CLOCK_ENABLE_MUX[app_c_l127_c1_4056]', 'mig_read_256[app_c_l116_c28_ab4f]']
49: ['TRUE_CLOCK_ENABLE_MUX[app_c_l127_c1_4056]', 'mig_read_256[app_c_l116_c28_ab4f]']
50: ['TRUE_CLOCK_ENABLE_MUX[app_c_l127_c1_4056]', 'mig_read_256[app_c_l116_c28_ab4f]']
51: ['TRUE_CLOCK_ENABLE_MUX[app_c_l127_c1_4056]', 'mig_read_256[app_c_l116_c28_ab4f]']
52: ['TRUE_CLOCK_ENABLE_MUX[app_c_l127_c1_4056]', 'mig_read_256[app_c_l116_c28_ab4f]']
53: ['TRUE_CLOCK_ENABLE_MUX[app_c_l127_c1_4056]', 'mig_read_256[app_c_l116_c28_ab4f]']
54: ['TRUE_CLOCK_ENABLE_MUX[app_c_l127_c1_4056]', 'mig_read_256[app_c_l116_c28_ab4f]']
55: ['TRUE_CLOCK_ENABLE_MUX[app_c_l127_c1_4056]', 'mig_read_256[app_c_l116_c28_ab4f]']
56: ['TRUE_CLOCK_ENABLE_MUX[app_c_l127_c1_4056]', 'mig_read_256[app_c_l116_c28_ab4f]']
57: ['TRUE_CLOCK_ENABLE_MUX[app_c_l127_c1_4056]', 'mig_read_256[app_c_l116_c28_ab4f]']
58: ['TRUE_CLOCK_ENABLE_MUX[app_c_l127_c1_4056]', 'mig_read_256[app_c_l116_c28_ab4f]']
59: ['TRUE_CLOCK_ENABLE_MUX[app_c_l127_c1_4056]', 'mig_read_256[app_c_l116_c28_ab4f]']
60: ['TRUE_CLOCK_ENABLE_MUX[app_c_l127_c1_4056]', 'mig_read_256[app_c_l116_c28_ab4f]']
61: ['TRUE_CLOCK_ENABLE_MUX[app_c_l127_c1_4056]', 'mig_read_256[app_c_l116_c28_ab4f]']
62: ['TRUE_CLOCK_ENABLE_MUX[app_c_l127_c1_4056]', 'mig_read_256[app_c_l116_c28_ab4f]']
63: ['TRUE_CLOCK_ENABLE_MUX[app_c_l127_c1_4056]', 'mig_read_256[app_c_l116_c28_ab4f]']
64: ['mig_read_256[app_c_l116_c28_ab4f]', 'uart_tx_msg_fifo_sender[app_c_l129_c40_b363]']
65: ['mig_read_256[app_c_l116_c28_ab4f]', 'uart_tx_msg_fifo_sender[app_c_l129_c40_b363]']
66: ['mig_read_256[app_c_l116_c28_ab4f]', 'uart_tx_msg_fifo_sender[app_c_l129_c40_b363]']
67: ['mig_read_256[app_c_l116_c28_ab4f]', 'uart_tx_msg_fifo_sender[app_c_l129_c40_b363]']
68: ['mig_read_256[app_c_l116_c28_ab4f]', 'uart_tx_msg_fifo_sender[app_c_l129_c40_b363]']
69: ['mig_read_256[app_c_l116_c28_ab4f]', 'uart_tx_msg_fifo_sender[app_c_l129_c40_b363]']
70: ['mig_read_256[app_c_l116_c28_ab4f]', 'uart_tx_msg_fifo_sender[app_c_l129_c40_b363]']
71: ['mig_read_256[app_c_l116_c28_ab4f]', 'uart_tx_msg_fifo_sender[app_c_l129_c40_b363]']
72: ['mig_read_256[app_c_l116_c28_ab4f]', 'uart_tx_msg_fifo_sender[app_c_l129_c40_b363]']
73: ['mig_read_256[app_c_l116_c28_ab4f]', 'uart_tx_msg_fifo_sender[app_c_l129_c40_b363]']
74: ['mig_read_256[app_c_l116_c28_ab4f]', 'uart_tx_msg_fifo_sender[app_c_l129_c40_b363]']
75: ['mig_read_256[app_c_l116_c28_ab4f]', 'uart_tx_msg_fifo_sender[app_c_l129_c40_b363]']
76: ['mig_read_256[app_c_l116_c28_ab4f]', 'uart_tx_msg_fifo_sender[app_c_l129_c40_b363]']
77: ['mig_read_256[app_c_l116_c28_ab4f]', 'uart_tx_msg_fifo_sender[app_c_l129_c40_b363]']
78: ['mig_read_256[app_c_l116_c28_ab4f]', 'uart_tx_msg_fifo_sender[app_c_l129_c40_b363]']
79: ['mig_read_256[app_c_l116_c28_ab4f]', 'uart_tx_msg_fifo_sender[app_c_l129_c40_b363]']
80: ['mig_read_256[app_c_l116_c28_ab4f]', 'o_done_MUX[app_c_l131_c5_2689]', 'state_MUX[app_c_l131_c5_2689]']
81: ['mig_read_256[app_c_l116_c28_ab4f]', 'o_done_MUX[app_c_l131_c5_2689]', 'state_MUX[app_c_l131_c5_2689]']
82: ['mig_read_256[app_c_l116_c28_ab4f]', 'o_done_MUX[app_c_l131_c5_2689]', 'state_MUX[app_c_l131_c5_2689]']
83: ['mig_read_256[app_c_l116_c28_ab4f]', 'o_done_MUX[app_c_l131_c5_2689]', 'state_MUX[app_c_l131_c5_2689]']
84: ['mig_read_256[app_c_l116_c28_ab4f]', 'o_done_MUX[app_c_l131_c5_2689]', 'state_MUX[app_c_l131_c5_2689]']
85: ['mig_read_256[app_c_l116_c28_ab4f]', 'o_done_MUX[app_c_l131_c5_2689]', 'state_MUX[app_c_l131_c5_2689]']
86: ['mig_read_256[app_c_l116_c28_ab4f]', 'o_done_MUX[app_c_l131_c5_2689]', 'state_MUX[app_c_l131_c5_2689]']
87: ['mig_read_256[app_c_l116_c28_ab4f]', 'o_done_MUX[app_c_l131_c5_2689]', 'state_MUX[app_c_l131_c5_2689]']
88: ['mig_read_256[app_c_l116_c28_ab4f]', 'o_done_MUX[app_c_l131_c5_2689]', 'state_MUX[app_c_l131_c5_2689]']
89: ['mig_read_256[app_c_l116_c28_ab4f]', 'o_done_MUX[app_c_l131_c5_2689]', 'state_MUX[app_c_l131_c5_2689]']
90: ['mig_read_256[app_c_l116_c28_ab4f]', 'o_done_MUX[app_c_l131_c5_2689]', 'state_MUX[app_c_l131_c5_2689]']
91: ['mig_read_256[app_c_l116_c28_ab4f]', 'o_done_MUX[app_c_l131_c5_2689]', 'state_MUX[app_c_l131_c5_2689]']
92: ['mig_read_256[app_c_l116_c28_ab4f]', 'o_done_MUX[app_c_l131_c5_2689]', 'state_MUX[app_c_l131_c5_2689]']
93: ['mig_read_256[app_c_l116_c28_ab4f]', 'o_done_MUX[app_c_l131_c5_2689]', 'state_MUX[app_c_l131_c5_2689]']
94: ['mig_read_256[app_c_l116_c28_ab4f]', 'o_done_MUX[app_c_l131_c5_2689]', 'state_MUX[app_c_l131_c5_2689]']
95: ['mig_read_256[app_c_l116_c28_ab4f]', 'o_done_MUX[app_c_l131_c5_2689]', 'state_MUX[app_c_l131_c5_2689]']
96: ['mig_read_256[app_c_l116_c28_ab4f]', 'o_done_MUX[app_c_l126_c8_057b]', 'state_MUX[app_c_l126_c8_057b]']
97: ['mig_read_256[app_c_l116_c28_ab4f]', 'o_done_MUX[app_c_l126_c8_057b]', 'state_MUX[app_c_l126_c8_057b]']
98: ['mig_read_256[app_c_l116_c28_ab4f]', 'o_done_MUX[app_c_l126_c8_057b]', 'state_MUX[app_c_l126_c8_057b]']
99: ['mig_read_256[app_c_l116_c28_ab4f]', 'o_done_MUX[app_c_l126_c8_057b]', 'state_MUX[app_c_l126_c8_057b]']
100: ['mig_read_256[app_c_l116_c28_ab4f]', 'o_done_MUX[app_c_l126_c8_057b]', 'state_MUX[app_c_l126_c8_057b]']
101: ['mig_read_256[app_c_l116_c28_ab4f]', 'o_done_MUX[app_c_l126_c8_057b]', 'state_MUX[app_c_l126_c8_057b]']
102: ['mig_read_256[app_c_l116_c28_ab4f]', 'o_done_MUX[app_c_l126_c8_057b]', 'state_MUX[app_c_l126_c8_057b]']
103: ['mig_read_256[app_c_l116_c28_ab4f]', 'o_done_MUX[app_c_l126_c8_057b]', 'state_MUX[app_c_l126_c8_057b]']
104: ['mig_read_256[app_c_l116_c28_ab4f]', 'o_done_MUX[app_c_l126_c8_057b]', 'state_MUX[app_c_l126_c8_057b]']
105: ['msg_MUX[app_c_l112_c8_2503]', 'o_done_MUX[app_c_l126_c8_057b]', 'o_to_mem_MUX[app_c_l112_c8_2503]', 'state_MUX[app_c_l120_c5_deb1]', 'state_MUX[app_c_l126_c8_057b]']
106: ['msg_MUX[app_c_l112_c8_2503]', 'o_done_MUX[app_c_l126_c8_057b]', 'o_to_mem_MUX[app_c_l112_c8_2503]', 'state_MUX[app_c_l120_c5_deb1]', 'state_MUX[app_c_l126_c8_057b]']
107: ['msg_MUX[app_c_l112_c8_2503]', 'o_done_MUX[app_c_l126_c8_057b]', 'o_to_mem_MUX[app_c_l112_c8_2503]', 'state_MUX[app_c_l120_c5_deb1]', 'state_MUX[app_c_l126_c8_057b]']
108: ['msg_MUX[app_c_l112_c8_2503]', 'o_done_MUX[app_c_l126_c8_057b]', 'o_to_mem_MUX[app_c_l112_c8_2503]', 'state_MUX[app_c_l120_c5_deb1]', 'state_MUX[app_c_l126_c8_057b]']
109: ['msg_MUX[app_c_l112_c8_2503]', 'o_done_MUX[app_c_l126_c8_057b]', 'o_to_mem_MUX[app_c_l112_c8_2503]', 'state_MUX[app_c_l120_c5_deb1]', 'state_MUX[app_c_l126_c8_057b]']
110: ['msg_MUX[app_c_l112_c8_2503]', 'o_done_MUX[app_c_l126_c8_057b]', 'o_to_mem_MUX[app_c_l112_c8_2503]', 'state_MUX[app_c_l120_c5_deb1]', 'state_MUX[app_c_l126_c8_057b]']
111: ['msg_MUX[app_c_l112_c8_2503]', 'o_done_MUX[app_c_l126_c8_057b]', 'o_to_mem_MUX[app_c_l112_c8_2503]', 'state_MUX[app_c_l120_c5_deb1]', 'state_MUX[app_c_l126_c8_057b]']
112: ['msg_MUX[app_c_l112_c8_2503]', 'o_done_MUX[app_c_l112_c8_2503]', 'o_to_mem_MUX[app_c_l112_c8_2503]', 'state_MUX[app_c_l120_c5_deb1]']
113: ['msg_MUX[app_c_l112_c8_2503]', 'o_done_MUX[app_c_l112_c8_2503]', 'o_to_mem_MUX[app_c_l112_c8_2503]', 'state_MUX[app_c_l120_c5_deb1]']
114: ['msg_MUX[app_c_l112_c8_2503]', 'o_done_MUX[app_c_l112_c8_2503]', 'o_to_mem_MUX[app_c_l112_c8_2503]', 'state_MUX[app_c_l120_c5_deb1]']
115: ['msg_MUX[app_c_l112_c8_2503]', 'o_done_MUX[app_c_l112_c8_2503]', 'o_to_mem_MUX[app_c_l112_c8_2503]', 'state_MUX[app_c_l120_c5_deb1]']
116: ['msg_MUX[app_c_l112_c8_2503]', 'o_done_MUX[app_c_l112_c8_2503]', 'o_to_mem_MUX[app_c_l112_c8_2503]', 'state_MUX[app_c_l120_c5_deb1]']
117: ['msg_MUX[app_c_l112_c8_2503]', 'o_done_MUX[app_c_l112_c8_2503]', 'o_to_mem_MUX[app_c_l112_c8_2503]', 'state_MUX[app_c_l120_c5_deb1]']
118: ['msg_MUX[app_c_l112_c8_2503]', 'o_done_MUX[app_c_l112_c8_2503]', 'o_to_mem_MUX[app_c_l112_c8_2503]', 'state_MUX[app_c_l120_c5_deb1]']
119: ['msg_MUX[app_c_l112_c8_2503]', 'o_done_MUX[app_c_l112_c8_2503]', 'o_to_mem_MUX[app_c_l112_c8_2503]', 'state_MUX[app_c_l120_c5_deb1]']
120: ['msg_MUX[app_c_l112_c8_2503]', 'o_done_MUX[app_c_l112_c8_2503]', 'o_to_mem_MUX[app_c_l112_c8_2503]', 'state_MUX[app_c_l120_c5_deb1]']
121: ['msg_MUX[app_c_l104_c3_8ba4]', 'o_done_MUX[app_c_l112_c8_2503]', 'state_MUX[app_c_l112_c8_2503]']
122: ['msg_MUX[app_c_l104_c3_8ba4]', 'o_done_MUX[app_c_l112_c8_2503]', 'state_MUX[app_c_l112_c8_2503]']
123: ['msg_MUX[app_c_l104_c3_8ba4]', 'o_done_MUX[app_c_l112_c8_2503]', 'state_MUX[app_c_l112_c8_2503]']
124: ['msg_MUX[app_c_l104_c3_8ba4]', 'o_done_MUX[app_c_l112_c8_2503]', 'state_MUX[app_c_l112_c8_2503]']
125: ['msg_MUX[app_c_l104_c3_8ba4]', 'o_done_MUX[app_c_l112_c8_2503]', 'state_MUX[app_c_l112_c8_2503]']
126: ['msg_MUX[app_c_l104_c3_8ba4]', 'o_done_MUX[app_c_l112_c8_2503]', 'state_MUX[app_c_l112_c8_2503]']
127: ['msg_MUX[app_c_l104_c3_8ba4]', 'o_done_MUX[app_c_l112_c8_2503]', 'state_MUX[app_c_l112_c8_2503]']
128: ['msg_MUX[app_c_l104_c3_8ba4]', 'o_MUX[app_c_l104_c3_8ba4]', 'state_MUX[app_c_l112_c8_2503]']
129: ['msg_MUX[app_c_l104_c3_8ba4]', 'o_MUX[app_c_l104_c3_8ba4]', 'state_MUX[app_c_l112_c8_2503]']
130: ['msg_MUX[app_c_l104_c3_8ba4]', 'o_MUX[app_c_l104_c3_8ba4]', 'state_MUX[app_c_l112_c8_2503]']
131: ['msg_MUX[app_c_l104_c3_8ba4]', 'o_MUX[app_c_l104_c3_8ba4]', 'state_MUX[app_c_l112_c8_2503]']
132: ['msg_MUX[app_c_l104_c3_8ba4]', 'o_MUX[app_c_l104_c3_8ba4]', 'state_MUX[app_c_l112_c8_2503]']
133: ['msg_MUX[app_c_l104_c3_8ba4]', 'o_MUX[app_c_l104_c3_8ba4]', 'state_MUX[app_c_l112_c8_2503]']
134: ['msg_MUX[app_c_l104_c3_8ba4]', 'o_MUX[app_c_l104_c3_8ba4]', 'state_MUX[app_c_l112_c8_2503]']
135: ['msg_MUX[app_c_l104_c3_8ba4]', 'o_MUX[app_c_l104_c3_8ba4]', 'state_MUX[app_c_l112_c8_2503]']
136: ['msg_MUX[app_c_l104_c3_8ba4]', 'o_MUX[app_c_l104_c3_8ba4]', 'state_MUX[app_c_l112_c8_2503]']
137: ['o_MUX[app_c_l104_c3_8ba4]', 'state_MUX[app_c_l104_c3_8ba4]']
138: ['o_MUX[app_c_l104_c3_8ba4]', 'state_MUX[app_c_l104_c3_8ba4]']
139: ['o_MUX[app_c_l104_c3_8ba4]', 'state_MUX[app_c_l104_c3_8ba4]']
140: ['o_MUX[app_c_l104_c3_8ba4]', 'state_MUX[app_c_l104_c3_8ba4]']
141: ['o_MUX[app_c_l104_c3_8ba4]', 'state_MUX[app_c_l104_c3_8ba4]']
142: ['o_MUX[app_c_l104_c3_8ba4]', 'state_MUX[app_c_l104_c3_8ba4]']
143: ['o_MUX[app_c_l104_c3_8ba4]', 'state_MUX[app_c_l104_c3_8ba4]']
144: ['state_MUX[app_c_l104_c3_8ba4]']
145: ['state_MUX[app_c_l104_c3_8ba4]']
146: ['state_MUX[app_c_l104_c3_8ba4]']
147: ['state_MUX[app_c_l104_c3_8ba4]']
148: ['state_MUX[app_c_l104_c3_8ba4]']
149: ['state_MUX[app_c_l104_c3_8ba4]']
150: ['state_MUX[app_c_l104_c3_8ba4]']
151: ['state_MUX[app_c_l104_c3_8ba4]']
152: ['state_MUX[app_c_l104_c3_8ba4]']

app
Pipeline Map:
0: ['BIN_OP_EQ[app_c_l165_c86_6813]', 'BIN_OP_EQ[app_c_l168_c6_5e05]', 'BIN_OP_EQ[app_c_l179_c11_16a9]', 'BIN_OP_EQ[app_c_l200_c11_6813]', 'BIN_OP_LT[app_c_l187_c10_181d]', 'BIN_OP_LT[app_c_l208_c10_181d]', 'BIN_OP_PLUS[app_c_l190_c9_b854]', 'BIN_OP_PLUS[app_c_l211_c9_b854]', 'UNARY_OP_NOT[app_c_l171_c29_913f]']
1: ['BIN_OP_EQ[app_c_l165_c86_6813]', 'BIN_OP_EQ[app_c_l168_c6_5e05]', 'BIN_OP_EQ[app_c_l179_c11_16a9]', 'BIN_OP_EQ[app_c_l200_c11_6813]', 'BIN_OP_LT[app_c_l187_c10_181d]', 'BIN_OP_LT[app_c_l208_c10_181d]', 'BIN_OP_PLUS[app_c_l190_c9_b854]', 'BIN_OP_PLUS[app_c_l211_c9_b854]', 'UNARY_OP_NOT[app_c_l171_c29_913f]']
2: ['BIN_OP_EQ[app_c_l165_c86_6813]', 'BIN_OP_EQ[app_c_l168_c6_5e05]', 'BIN_OP_EQ[app_c_l179_c11_16a9]', 'BIN_OP_EQ[app_c_l200_c11_6813]', 'BIN_OP_LT[app_c_l187_c10_181d]', 'BIN_OP_LT[app_c_l208_c10_181d]', 'BIN_OP_PLUS[app_c_l190_c9_b854]', 'BIN_OP_PLUS[app_c_l211_c9_b854]', 'UNARY_OP_NOT[app_c_l171_c29_913f]']
3: ['BIN_OP_EQ[app_c_l165_c86_6813]', 'BIN_OP_EQ[app_c_l168_c6_5e05]', 'BIN_OP_EQ[app_c_l179_c11_16a9]', 'BIN_OP_EQ[app_c_l200_c11_6813]', 'BIN_OP_LT[app_c_l187_c10_181d]', 'BIN_OP_LT[app_c_l208_c10_181d]', 'BIN_OP_PLUS[app_c_l190_c9_b854]', 'BIN_OP_PLUS[app_c_l211_c9_b854]', 'UNARY_OP_NOT[app_c_l171_c29_913f]']
4: ['BIN_OP_EQ[app_c_l165_c86_6813]', 'BIN_OP_EQ[app_c_l168_c6_5e05]', 'BIN_OP_EQ[app_c_l179_c11_16a9]', 'BIN_OP_EQ[app_c_l200_c11_6813]', 'BIN_OP_LT[app_c_l187_c10_181d]', 'BIN_OP_LT[app_c_l208_c10_181d]', 'BIN_OP_PLUS[app_c_l190_c9_b854]', 'BIN_OP_PLUS[app_c_l211_c9_b854]', 'UNARY_OP_NOT[app_c_l171_c29_913f]']
5: ['BIN_OP_EQ[app_c_l165_c86_6813]', 'BIN_OP_EQ[app_c_l168_c6_5e05]', 'BIN_OP_EQ[app_c_l179_c11_16a9]', 'BIN_OP_EQ[app_c_l200_c11_6813]', 'BIN_OP_LT[app_c_l187_c10_181d]', 'BIN_OP_LT[app_c_l208_c10_181d]', 'BIN_OP_PLUS[app_c_l190_c9_b854]', 'BIN_OP_PLUS[app_c_l211_c9_b854]', 'UNARY_OP_NOT[app_c_l171_c29_913f]']
6: ['BIN_OP_EQ[app_c_l165_c86_6813]', 'BIN_OP_EQ[app_c_l168_c6_5e05]', 'BIN_OP_EQ[app_c_l179_c11_16a9]', 'BIN_OP_EQ[app_c_l200_c11_6813]', 'BIN_OP_LT[app_c_l187_c10_181d]', 'BIN_OP_LT[app_c_l208_c10_181d]', 'BIN_OP_PLUS[app_c_l190_c9_b854]', 'BIN_OP_PLUS[app_c_l211_c9_b854]', 'UNARY_OP_NOT[app_c_l171_c29_913f]']
7: ['BIN_OP_EQ[app_c_l165_c86_6813]', 'BIN_OP_EQ[app_c_l168_c6_5e05]', 'BIN_OP_EQ[app_c_l179_c11_16a9]', 'BIN_OP_EQ[app_c_l200_c11_6813]', 'BIN_OP_LT[app_c_l187_c10_181d]', 'BIN_OP_LT[app_c_l208_c10_181d]', 'BIN_OP_PLUS[app_c_l190_c9_b854]', 'BIN_OP_PLUS[app_c_l211_c9_b854]', 'UNARY_OP_NOT[app_c_l171_c29_913f]']
8: ['BIN_OP_EQ[app_c_l165_c86_6813]', 'BIN_OP_EQ[app_c_l168_c6_5e05]', 'BIN_OP_EQ[app_c_l179_c11_16a9]', 'BIN_OP_EQ[app_c_l200_c11_6813]', 'BIN_OP_LT[app_c_l187_c10_181d]', 'BIN_OP_LT[app_c_l208_c10_181d]', 'BIN_OP_PLUS[app_c_l190_c9_b854]', 'BIN_OP_PLUS[app_c_l211_c9_b854]', 'UNARY_OP_NOT[app_c_l171_c29_913f]']
9: ['BIN_OP_EQ[app_c_l165_c86_6813]', 'BIN_OP_EQ[app_c_l168_c6_5e05]', 'BIN_OP_EQ[app_c_l179_c11_16a9]', 'BIN_OP_EQ[app_c_l200_c11_6813]', 'BIN_OP_LT[app_c_l187_c10_181d]', 'BIN_OP_LT[app_c_l208_c10_181d]', 'BIN_OP_PLUS[app_c_l190_c9_b854]', 'BIN_OP_PLUS[app_c_l211_c9_b854]', 'UNARY_OP_NOT[app_c_l171_c29_913f]']
10: ['BIN_OP_EQ[app_c_l165_c86_6813]', 'BIN_OP_EQ[app_c_l168_c6_5e05]', 'BIN_OP_EQ[app_c_l179_c11_16a9]', 'BIN_OP_EQ[app_c_l200_c11_6813]', 'BIN_OP_LT[app_c_l187_c10_181d]', 'BIN_OP_LT[app_c_l208_c10_181d]', 'BIN_OP_PLUS[app_c_l190_c9_b854]', 'BIN_OP_PLUS[app_c_l211_c9_b854]', 'UNARY_OP_NOT[app_c_l171_c29_913f]']
11: ['BIN_OP_EQ[app_c_l165_c86_6813]', 'BIN_OP_EQ[app_c_l168_c6_5e05]', 'BIN_OP_EQ[app_c_l179_c11_16a9]', 'BIN_OP_EQ[app_c_l200_c11_6813]', 'BIN_OP_LT[app_c_l187_c10_181d]', 'BIN_OP_LT[app_c_l208_c10_181d]', 'BIN_OP_PLUS[app_c_l190_c9_b854]', 'BIN_OP_PLUS[app_c_l211_c9_b854]', 'UNARY_OP_NOT[app_c_l171_c29_913f]']
12: ['BIN_OP_AND[app_c_l171_c29_13f2]', 'BIN_OP_EQ[app_c_l165_c86_6813]', 'BIN_OP_EQ[app_c_l168_c6_5e05]', 'BIN_OP_EQ[app_c_l179_c11_16a9]', 'BIN_OP_EQ[app_c_l200_c11_6813]', 'BIN_OP_LT[app_c_l187_c10_181d]', 'BIN_OP_LT[app_c_l208_c10_181d]', 'BIN_OP_PLUS[app_c_l190_c9_b854]', 'BIN_OP_PLUS[app_c_l211_c9_b854]']
13: ['BIN_OP_AND[app_c_l171_c29_13f2]', 'BIN_OP_EQ[app_c_l165_c86_6813]', 'BIN_OP_EQ[app_c_l168_c6_5e05]', 'BIN_OP_EQ[app_c_l179_c11_16a9]', 'BIN_OP_EQ[app_c_l200_c11_6813]', 'BIN_OP_LT[app_c_l187_c10_181d]', 'BIN_OP_LT[app_c_l208_c10_181d]', 'BIN_OP_PLUS[app_c_l190_c9_b854]', 'BIN_OP_PLUS[app_c_l211_c9_b854]']
14: ['BIN_OP_AND[app_c_l171_c29_13f2]', 'BIN_OP_EQ[app_c_l165_c86_6813]', 'BIN_OP_EQ[app_c_l168_c6_5e05]', 'BIN_OP_EQ[app_c_l179_c11_16a9]', 'BIN_OP_EQ[app_c_l200_c11_6813]', 'BIN_OP_LT[app_c_l187_c10_181d]', 'BIN_OP_LT[app_c_l208_c10_181d]', 'BIN_OP_PLUS[app_c_l190_c9_b854]', 'BIN_OP_PLUS[app_c_l211_c9_b854]']
15: ['BIN_OP_AND[app_c_l171_c29_13f2]', 'BIN_OP_EQ[app_c_l165_c86_6813]', 'BIN_OP_EQ[app_c_l168_c6_5e05]', 'BIN_OP_EQ[app_c_l179_c11_16a9]', 'BIN_OP_EQ[app_c_l200_c11_6813]', 'BIN_OP_LT[app_c_l187_c10_181d]', 'BIN_OP_LT[app_c_l208_c10_181d]', 'BIN_OP_PLUS[app_c_l190_c9_b854]', 'BIN_OP_PLUS[app_c_l211_c9_b854]']
16: ['BIN_OP_AND[app_c_l171_c29_13f2]', 'BIN_OP_LT[app_c_l187_c10_181d]', 'BIN_OP_LT[app_c_l208_c10_181d]', 'BIN_OP_PLUS[app_c_l190_c9_b854]', 'BIN_OP_PLUS[app_c_l211_c9_b854]', 'FALSE_CLOCK_ENABLE_MUX[app_c_l179_c8_1bbb]']
17: ['BIN_OP_AND[app_c_l171_c29_13f2]', 'BIN_OP_LT[app_c_l187_c10_181d]', 'BIN_OP_LT[app_c_l208_c10_181d]', 'BIN_OP_PLUS[app_c_l190_c9_b854]', 'BIN_OP_PLUS[app_c_l211_c9_b854]', 'FALSE_CLOCK_ENABLE_MUX[app_c_l179_c8_1bbb]']
18: ['BIN_OP_AND[app_c_l171_c29_13f2]', 'BIN_OP_LT[app_c_l187_c10_181d]', 'BIN_OP_LT[app_c_l208_c10_181d]', 'BIN_OP_PLUS[app_c_l190_c9_b854]', 'BIN_OP_PLUS[app_c_l211_c9_b854]', 'FALSE_CLOCK_ENABLE_MUX[app_c_l179_c8_1bbb]']
19: ['BIN_OP_AND[app_c_l171_c29_13f2]', 'BIN_OP_LT[app_c_l187_c10_181d]', 'BIN_OP_LT[app_c_l208_c10_181d]', 'BIN_OP_PLUS[app_c_l190_c9_b854]', 'BIN_OP_PLUS[app_c_l211_c9_b854]', 'FALSE_CLOCK_ENABLE_MUX[app_c_l179_c8_1bbb]']
20: ['BIN_OP_AND[app_c_l171_c29_13f2]', 'BIN_OP_LT[app_c_l187_c10_181d]', 'BIN_OP_LT[app_c_l208_c10_181d]', 'BIN_OP_PLUS[app_c_l190_c9_b854]', 'BIN_OP_PLUS[app_c_l211_c9_b854]', 'FALSE_CLOCK_ENABLE_MUX[app_c_l179_c8_1bbb]']
21: ['BIN_OP_AND[app_c_l171_c29_13f2]', 'BIN_OP_LT[app_c_l187_c10_181d]', 'BIN_OP_LT[app_c_l208_c10_181d]', 'BIN_OP_PLUS[app_c_l190_c9_b854]', 'BIN_OP_PLUS[app_c_l211_c9_b854]', 'FALSE_CLOCK_ENABLE_MUX[app_c_l179_c8_1bbb]']
22: ['BIN_OP_AND[app_c_l171_c29_13f2]', 'BIN_OP_LT[app_c_l187_c10_181d]', 'BIN_OP_LT[app_c_l208_c10_181d]', 'BIN_OP_PLUS[app_c_l190_c9_b854]', 'BIN_OP_PLUS[app_c_l211_c9_b854]', 'FALSE_CLOCK_ENABLE_MUX[app_c_l179_c8_1bbb]']
23: ['BIN_OP_AND[app_c_l171_c29_13f2]', 'BIN_OP_LT[app_c_l187_c10_181d]', 'BIN_OP_LT[app_c_l208_c10_181d]', 'BIN_OP_PLUS[app_c_l190_c9_b854]', 'BIN_OP_PLUS[app_c_l211_c9_b854]', 'FALSE_CLOCK_ENABLE_MUX[app_c_l179_c8_1bbb]']
24: ['BIN_OP_AND[app_c_l171_c29_13f2]', 'BIN_OP_LT[app_c_l187_c10_181d]', 'BIN_OP_LT[app_c_l208_c10_181d]', 'BIN_OP_PLUS[app_c_l190_c9_b854]', 'BIN_OP_PLUS[app_c_l211_c9_b854]', 'FALSE_CLOCK_ENABLE_MUX[app_c_l179_c8_1bbb]']
25: ['BIN_OP_PLUS[app_c_l190_c9_b854]', 'BIN_OP_PLUS[app_c_l211_c9_b854]', 'FALSE_CLOCK_ENABLE_MUX[app_c_l179_c8_1bbb]', 'state_MUX[app_c_l172_c5_ce06]', 'state_MUX[app_c_l187_c7_081a]', 'state_MUX[app_c_l208_c7_f3b1]']
26: ['BIN_OP_PLUS[app_c_l190_c9_b854]', 'BIN_OP_PLUS[app_c_l211_c9_b854]', 'FALSE_CLOCK_ENABLE_MUX[app_c_l179_c8_1bbb]', 'state_MUX[app_c_l172_c5_ce06]', 'state_MUX[app_c_l187_c7_081a]', 'state_MUX[app_c_l208_c7_f3b1]']
27: ['BIN_OP_PLUS[app_c_l190_c9_b854]', 'BIN_OP_PLUS[app_c_l211_c9_b854]', 'FALSE_CLOCK_ENABLE_MUX[app_c_l179_c8_1bbb]', 'state_MUX[app_c_l172_c5_ce06]', 'state_MUX[app_c_l187_c7_081a]', 'state_MUX[app_c_l208_c7_f3b1]']
28: ['BIN_OP_PLUS[app_c_l190_c9_b854]', 'BIN_OP_PLUS[app_c_l211_c9_b854]', 'FALSE_CLOCK_ENABLE_MUX[app_c_l179_c8_1bbb]', 'state_MUX[app_c_l172_c5_ce06]', 'state_MUX[app_c_l187_c7_081a]', 'state_MUX[app_c_l208_c7_f3b1]']
29: ['FALSE_CLOCK_ENABLE_MUX[app_c_l179_c8_1bbb]', 'num_msgs_MUX[app_c_l187_c7_081a]', 'num_msgs_MUX[app_c_l208_c7_f3b1]', 'state_MUX[app_c_l172_c5_ce06]', 'state_MUX[app_c_l187_c7_081a]', 'state_MUX[app_c_l208_c7_f3b1]']
30: ['FALSE_CLOCK_ENABLE_MUX[app_c_l179_c8_1bbb]', 'num_msgs_MUX[app_c_l187_c7_081a]', 'num_msgs_MUX[app_c_l208_c7_f3b1]', 'state_MUX[app_c_l172_c5_ce06]', 'state_MUX[app_c_l187_c7_081a]', 'state_MUX[app_c_l208_c7_f3b1]']
31: ['FALSE_CLOCK_ENABLE_MUX[app_c_l179_c8_1bbb]', 'num_msgs_MUX[app_c_l187_c7_081a]', 'num_msgs_MUX[app_c_l208_c7_f3b1]', 'state_MUX[app_c_l172_c5_ce06]', 'state_MUX[app_c_l187_c7_081a]', 'state_MUX[app_c_l208_c7_f3b1]']
32: ['FALSE_CLOCK_ENABLE_MUX[app_c_l200_c8_c292]', 'TRUE_CLOCK_ENABLE_MUX[app_c_l180_c1_24ed]', 'num_msgs_MUX[app_c_l187_c7_081a]', 'num_msgs_MUX[app_c_l208_c7_f3b1]', 'state_MUX[app_c_l172_c5_ce06]', 'state_MUX[app_c_l187_c7_081a]', 'state_MUX[app_c_l208_c7_f3b1]']
33: ['FALSE_CLOCK_ENABLE_MUX[app_c_l200_c8_c292]', 'TRUE_CLOCK_ENABLE_MUX[app_c_l180_c1_24ed]', 'num_msgs_MUX[app_c_l187_c7_081a]', 'num_msgs_MUX[app_c_l208_c7_f3b1]', 'state_MUX[app_c_l172_c5_ce06]', 'state_MUX[app_c_l187_c7_081a]', 'state_MUX[app_c_l208_c7_f3b1]']
34: ['FALSE_CLOCK_ENABLE_MUX[app_c_l200_c8_c292]', 'TRUE_CLOCK_ENABLE_MUX[app_c_l180_c1_24ed]', 'num_msgs_MUX[app_c_l187_c7_081a]', 'num_msgs_MUX[app_c_l208_c7_f3b1]', 'state_MUX[app_c_l172_c5_ce06]', 'state_MUX[app_c_l187_c7_081a]', 'state_MUX[app_c_l208_c7_f3b1]']
35: ['FALSE_CLOCK_ENABLE_MUX[app_c_l200_c8_c292]', 'TRUE_CLOCK_ENABLE_MUX[app_c_l180_c1_24ed]', 'num_msgs_MUX[app_c_l187_c7_081a]', 'num_msgs_MUX[app_c_l208_c7_f3b1]', 'state_MUX[app_c_l172_c5_ce06]', 'state_MUX[app_c_l187_c7_081a]', 'state_MUX[app_c_l208_c7_f3b1]']
36: ['FALSE_CLOCK_ENABLE_MUX[app_c_l200_c8_c292]', 'TRUE_CLOCK_ENABLE_MUX[app_c_l180_c1_24ed]', 'num_msgs_MUX[app_c_l187_c7_081a]', 'num_msgs_MUX[app_c_l208_c7_f3b1]', 'state_MUX[app_c_l172_c5_ce06]', 'state_MUX[app_c_l187_c7_081a]', 'state_MUX[app_c_l208_c7_f3b1]']
37: ['FALSE_CLOCK_ENABLE_MUX[app_c_l200_c8_c292]', 'TRUE_CLOCK_ENABLE_MUX[app_c_l180_c1_24ed]', 'num_msgs_MUX[app_c_l187_c7_081a]', 'num_msgs_MUX[app_c_l208_c7_f3b1]', 'state_MUX[app_c_l172_c5_ce06]', 'state_MUX[app_c_l187_c7_081a]', 'state_MUX[app_c_l208_c7_f3b1]']
38: ['FALSE_CLOCK_ENABLE_MUX[app_c_l200_c8_c292]', 'TRUE_CLOCK_ENABLE_MUX[app_c_l180_c1_24ed]', 'num_msgs_MUX[app_c_l187_c7_081a]', 'num_msgs_MUX[app_c_l208_c7_f3b1]', 'state_MUX[app_c_l172_c5_ce06]', 'state_MUX[app_c_l187_c7_081a]', 'state_MUX[app_c_l208_c7_f3b1]']
39: ['FALSE_CLOCK_ENABLE_MUX[app_c_l200_c8_c292]', 'TRUE_CLOCK_ENABLE_MUX[app_c_l180_c1_24ed]', 'num_msgs_MUX[app_c_l187_c7_081a]', 'num_msgs_MUX[app_c_l208_c7_f3b1]', 'state_MUX[app_c_l172_c5_ce06]', 'state_MUX[app_c_l187_c7_081a]', 'state_MUX[app_c_l208_c7_f3b1]']
40: ['FALSE_CLOCK_ENABLE_MUX[app_c_l200_c8_c292]', 'TRUE_CLOCK_ENABLE_MUX[app_c_l180_c1_24ed]', 'num_msgs_MUX[app_c_l187_c7_081a]', 'num_msgs_MUX[app_c_l208_c7_f3b1]', 'state_MUX[app_c_l172_c5_ce06]', 'state_MUX[app_c_l187_c7_081a]', 'state_MUX[app_c_l208_c7_f3b1]']
41: ['FALSE_CLOCK_ENABLE_MUX[app_c_l200_c8_c292]', 'TRUE_CLOCK_ENABLE_MUX[app_c_l180_c1_24ed]', 'num_msgs_MUX[app_c_l187_c7_081a]', 'num_msgs_MUX[app_c_l208_c7_f3b1]']
42: ['FALSE_CLOCK_ENABLE_MUX[app_c_l200_c8_c292]', 'TRUE_CLOCK_ENABLE_MUX[app_c_l180_c1_24ed]', 'num_msgs_MUX[app_c_l187_c7_081a]', 'num_msgs_MUX[app_c_l208_c7_f3b1]']
43: ['FALSE_CLOCK_ENABLE_MUX[app_c_l200_c8_c292]', 'TRUE_CLOCK_ENABLE_MUX[app_c_l180_c1_24ed]', 'num_msgs_MUX[app_c_l187_c7_081a]', 'num_msgs_MUX[app_c_l208_c7_f3b1]']
44: ['FALSE_CLOCK_ENABLE_MUX[app_c_l200_c8_c292]', 'TRUE_CLOCK_ENABLE_MUX[app_c_l180_c1_24ed]', 'num_msgs_MUX[app_c_l187_c7_081a]', 'num_msgs_MUX[app_c_l208_c7_f3b1]']
45: ['FALSE_CLOCK_ENABLE_MUX[app_c_l200_c8_c292]', 'TRUE_CLOCK_ENABLE_MUX[app_c_l180_c1_24ed]']
46: ['FALSE_CLOCK_ENABLE_MUX[app_c_l200_c8_c292]', 'TRUE_CLOCK_ENABLE_MUX[app_c_l180_c1_24ed]']
47: ['FALSE_CLOCK_ENABLE_MUX[app_c_l200_c8_c292]', 'TRUE_CLOCK_ENABLE_MUX[app_c_l180_c1_24ed]']
48: ['TRUE_CLOCK_ENABLE_MUX[app_c_l201_c1_1882]', 'uart_to_mem[app_c_l182_c28_773b]']
49: ['TRUE_CLOCK_ENABLE_MUX[app_c_l201_c1_1882]', 'uart_to_mem[app_c_l182_c28_773b]']
50: ['TRUE_CLOCK_ENABLE_MUX[app_c_l201_c1_1882]', 'uart_to_mem[app_c_l182_c28_773b]']
51: ['TRUE_CLOCK_ENABLE_MUX[app_c_l201_c1_1882]', 'uart_to_mem[app_c_l182_c28_773b]']
52: ['TRUE_CLOCK_ENABLE_MUX[app_c_l201_c1_1882]', 'uart_to_mem[app_c_l182_c28_773b]']
53: ['TRUE_CLOCK_ENABLE_MUX[app_c_l201_c1_1882]', 'uart_to_mem[app_c_l182_c28_773b]']
54: ['TRUE_CLOCK_ENABLE_MUX[app_c_l201_c1_1882]', 'uart_to_mem[app_c_l182_c28_773b]']
55: ['TRUE_CLOCK_ENABLE_MUX[app_c_l201_c1_1882]', 'uart_to_mem[app_c_l182_c28_773b]']
56: ['TRUE_CLOCK_ENABLE_MUX[app_c_l201_c1_1882]', 'uart_to_mem[app_c_l182_c28_773b]']
57: ['TRUE_CLOCK_ENABLE_MUX[app_c_l201_c1_1882]', 'uart_to_mem[app_c_l182_c28_773b]']
58: ['TRUE_CLOCK_ENABLE_MUX[app_c_l201_c1_1882]', 'uart_to_mem[app_c_l182_c28_773b]']
59: ['TRUE_CLOCK_ENABLE_MUX[app_c_l201_c1_1882]', 'uart_to_mem[app_c_l182_c28_773b]']
60: ['TRUE_CLOCK_ENABLE_MUX[app_c_l201_c1_1882]', 'uart_to_mem[app_c_l182_c28_773b]']
61: ['TRUE_CLOCK_ENABLE_MUX[app_c_l201_c1_1882]', 'uart_to_mem[app_c_l182_c28_773b]']
62: ['TRUE_CLOCK_ENABLE_MUX[app_c_l201_c1_1882]', 'uart_to_mem[app_c_l182_c28_773b]']
63: ['TRUE_CLOCK_ENABLE_MUX[app_c_l201_c1_1882]', 'uart_to_mem[app_c_l182_c28_773b]']
64: ['mem_to_uart[app_c_l203_c28_e78d]', 'uart_to_mem[app_c_l182_c28_773b]']
65: ['mem_to_uart[app_c_l203_c28_e78d]', 'uart_to_mem[app_c_l182_c28_773b]']
66: ['mem_to_uart[app_c_l203_c28_e78d]', 'uart_to_mem[app_c_l182_c28_773b]']
67: ['mem_to_uart[app_c_l203_c28_e78d]', 'uart_to_mem[app_c_l182_c28_773b]']
68: ['mem_to_uart[app_c_l203_c28_e78d]', 'uart_to_mem[app_c_l182_c28_773b]']
69: ['mem_to_uart[app_c_l203_c28_e78d]', 'uart_to_mem[app_c_l182_c28_773b]']
70: ['mem_to_uart[app_c_l203_c28_e78d]', 'uart_to_mem[app_c_l182_c28_773b]']
71: ['mem_to_uart[app_c_l203_c28_e78d]', 'uart_to_mem[app_c_l182_c28_773b]']
72: ['mem_to_uart[app_c_l203_c28_e78d]', 'uart_to_mem[app_c_l182_c28_773b]']
73: ['mem_to_uart[app_c_l203_c28_e78d]', 'uart_to_mem[app_c_l182_c28_773b]']
74: ['mem_to_uart[app_c_l203_c28_e78d]', 'uart_to_mem[app_c_l182_c28_773b]']
75: ['mem_to_uart[app_c_l203_c28_e78d]', 'uart_to_mem[app_c_l182_c28_773b]']
76: ['mem_to_uart[app_c_l203_c28_e78d]', 'uart_to_mem[app_c_l182_c28_773b]']
77: ['mem_to_uart[app_c_l203_c28_e78d]', 'uart_to_mem[app_c_l182_c28_773b]']
78: ['mem_to_uart[app_c_l203_c28_e78d]', 'uart_to_mem[app_c_l182_c28_773b]']
79: ['mem_to_uart[app_c_l203_c28_e78d]', 'uart_to_mem[app_c_l182_c28_773b]']
80: ['mem_to_uart[app_c_l203_c28_e78d]', 'uart_to_mem[app_c_l182_c28_773b]']
81: ['mem_to_uart[app_c_l203_c28_e78d]', 'uart_to_mem[app_c_l182_c28_773b]']
82: ['mem_to_uart[app_c_l203_c28_e78d]', 'uart_to_mem[app_c_l182_c28_773b]']
83: ['mem_to_uart[app_c_l203_c28_e78d]', 'uart_to_mem[app_c_l182_c28_773b]']
84: ['mem_to_uart[app_c_l203_c28_e78d]', 'uart_to_mem[app_c_l182_c28_773b]']
85: ['mem_to_uart[app_c_l203_c28_e78d]', 'uart_to_mem[app_c_l182_c28_773b]']
86: ['mem_to_uart[app_c_l203_c28_e78d]', 'uart_to_mem[app_c_l182_c28_773b]']
87: ['mem_to_uart[app_c_l203_c28_e78d]', 'uart_to_mem[app_c_l182_c28_773b]']
88: ['mem_to_uart[app_c_l203_c28_e78d]', 'uart_to_mem[app_c_l182_c28_773b]']
89: ['mem_to_uart[app_c_l203_c28_e78d]', 'uart_to_mem[app_c_l182_c28_773b]']
90: ['mem_to_uart[app_c_l203_c28_e78d]', 'uart_to_mem[app_c_l182_c28_773b]']
91: ['mem_to_uart[app_c_l203_c28_e78d]', 'uart_to_mem[app_c_l182_c28_773b]']
92: ['mem_to_uart[app_c_l203_c28_e78d]', 'uart_to_mem[app_c_l182_c28_773b]']
93: ['mem_to_uart[app_c_l203_c28_e78d]', 'uart_to_mem[app_c_l182_c28_773b]']
94: ['mem_to_uart[app_c_l203_c28_e78d]', 'uart_to_mem[app_c_l182_c28_773b]']
95: ['mem_to_uart[app_c_l203_c28_e78d]', 'uart_to_mem[app_c_l182_c28_773b]']
96: ['mem_to_uart[app_c_l203_c28_e78d]', 'uart_to_mem[app_c_l182_c28_773b]']
97: ['mem_to_uart[app_c_l203_c28_e78d]', 'uart_to_mem[app_c_l182_c28_773b]']
98: ['mem_to_uart[app_c_l203_c28_e78d]', 'uart_to_mem[app_c_l182_c28_773b]']
99: ['mem_to_uart[app_c_l203_c28_e78d]', 'uart_to_mem[app_c_l182_c28_773b]']
100: ['mem_to_uart[app_c_l203_c28_e78d]', 'uart_to_mem[app_c_l182_c28_773b]']
101: ['mem_to_uart[app_c_l203_c28_e78d]', 'uart_to_mem[app_c_l182_c28_773b]']
102: ['mem_to_uart[app_c_l203_c28_e78d]', 'uart_to_mem[app_c_l182_c28_773b]']
103: ['mem_to_uart[app_c_l203_c28_e78d]', 'uart_to_mem[app_c_l182_c28_773b]']
104: ['mem_to_uart[app_c_l203_c28_e78d]', 'uart_to_mem[app_c_l182_c28_773b]']
105: ['mem_to_uart[app_c_l203_c28_e78d]', 'uart_to_mem[app_c_l182_c28_773b]']
106: ['mem_to_uart[app_c_l203_c28_e78d]', 'uart_to_mem[app_c_l182_c28_773b]']
107: ['mem_to_uart[app_c_l203_c28_e78d]', 'uart_to_mem[app_c_l182_c28_773b]']
108: ['mem_to_uart[app_c_l203_c28_e78d]', 'uart_to_mem[app_c_l182_c28_773b]']
109: ['mem_to_uart[app_c_l203_c28_e78d]', 'uart_to_mem[app_c_l182_c28_773b]']
110: ['mem_to_uart[app_c_l203_c28_e78d]', 'uart_to_mem[app_c_l182_c28_773b]']
111: ['mem_to_uart[app_c_l203_c28_e78d]', 'uart_to_mem[app_c_l182_c28_773b]']
112: ['mem_to_uart[app_c_l203_c28_e78d]', 'num_msgs_MUX[app_c_l184_c5_13ff]', 'state_MUX[app_c_l184_c5_13ff]']
113: ['mem_to_uart[app_c_l203_c28_e78d]', 'num_msgs_MUX[app_c_l184_c5_13ff]', 'state_MUX[app_c_l184_c5_13ff]']
114: ['mem_to_uart[app_c_l203_c28_e78d]', 'num_msgs_MUX[app_c_l184_c5_13ff]', 'state_MUX[app_c_l184_c5_13ff]']
115: ['mem_to_uart[app_c_l203_c28_e78d]', 'num_msgs_MUX[app_c_l184_c5_13ff]', 'state_MUX[app_c_l184_c5_13ff]']
116: ['mem_to_uart[app_c_l203_c28_e78d]', 'num_msgs_MUX[app_c_l184_c5_13ff]', 'state_MUX[app_c_l184_c5_13ff]']
117: ['mem_to_uart[app_c_l203_c28_e78d]', 'num_msgs_MUX[app_c_l184_c5_13ff]', 'state_MUX[app_c_l184_c5_13ff]']
118: ['mem_to_uart[app_c_l203_c28_e78d]', 'num_msgs_MUX[app_c_l184_c5_13ff]', 'state_MUX[app_c_l184_c5_13ff]']
119: ['mem_to_uart[app_c_l203_c28_e78d]', 'num_msgs_MUX[app_c_l184_c5_13ff]', 'state_MUX[app_c_l184_c5_13ff]']
120: ['mem_to_uart[app_c_l203_c28_e78d]', 'num_msgs_MUX[app_c_l184_c5_13ff]', 'state_MUX[app_c_l184_c5_13ff]']
121: ['num_msgs_MUX[app_c_l184_c5_13ff]', 'num_msgs_MUX[app_c_l205_c5_471f]', 'state_MUX[app_c_l184_c5_13ff]', 'state_MUX[app_c_l205_c5_471f]', 'to_mem_MUX[app_c_l200_c8_c292]']
122: ['num_msgs_MUX[app_c_l184_c5_13ff]', 'num_msgs_MUX[app_c_l205_c5_471f]', 'state_MUX[app_c_l184_c5_13ff]', 'state_MUX[app_c_l205_c5_471f]', 'to_mem_MUX[app_c_l200_c8_c292]']
123: ['num_msgs_MUX[app_c_l184_c5_13ff]', 'num_msgs_MUX[app_c_l205_c5_471f]', 'state_MUX[app_c_l184_c5_13ff]', 'state_MUX[app_c_l205_c5_471f]', 'to_mem_MUX[app_c_l200_c8_c292]']
124: ['num_msgs_MUX[app_c_l184_c5_13ff]', 'num_msgs_MUX[app_c_l205_c5_471f]', 'state_MUX[app_c_l184_c5_13ff]', 'state_MUX[app_c_l205_c5_471f]', 'to_mem_MUX[app_c_l200_c8_c292]']
125: ['num_msgs_MUX[app_c_l184_c5_13ff]', 'num_msgs_MUX[app_c_l205_c5_471f]', 'state_MUX[app_c_l184_c5_13ff]', 'state_MUX[app_c_l205_c5_471f]', 'to_mem_MUX[app_c_l200_c8_c292]']
126: ['num_msgs_MUX[app_c_l184_c5_13ff]', 'num_msgs_MUX[app_c_l205_c5_471f]', 'state_MUX[app_c_l184_c5_13ff]', 'state_MUX[app_c_l205_c5_471f]', 'to_mem_MUX[app_c_l200_c8_c292]']
127: ['num_msgs_MUX[app_c_l184_c5_13ff]', 'num_msgs_MUX[app_c_l205_c5_471f]', 'state_MUX[app_c_l184_c5_13ff]', 'state_MUX[app_c_l205_c5_471f]', 'to_mem_MUX[app_c_l200_c8_c292]']
128: ['num_msgs_MUX[app_c_l205_c5_471f]', 'state_MUX[app_c_l205_c5_471f]', 'to_mem_MUX[app_c_l200_c8_c292]']
129: ['num_msgs_MUX[app_c_l205_c5_471f]', 'state_MUX[app_c_l205_c5_471f]', 'to_mem_MUX[app_c_l200_c8_c292]']
130: ['num_msgs_MUX[app_c_l205_c5_471f]', 'state_MUX[app_c_l205_c5_471f]', 'to_mem_MUX[app_c_l200_c8_c292]']
131: ['num_msgs_MUX[app_c_l205_c5_471f]', 'state_MUX[app_c_l205_c5_471f]', 'to_mem_MUX[app_c_l200_c8_c292]']
132: ['num_msgs_MUX[app_c_l205_c5_471f]', 'state_MUX[app_c_l205_c5_471f]', 'to_mem_MUX[app_c_l200_c8_c292]']
133: ['num_msgs_MUX[app_c_l205_c5_471f]', 'state_MUX[app_c_l205_c5_471f]', 'to_mem_MUX[app_c_l200_c8_c292]']
134: ['num_msgs_MUX[app_c_l205_c5_471f]', 'state_MUX[app_c_l205_c5_471f]', 'to_mem_MUX[app_c_l200_c8_c292]']
135: ['num_msgs_MUX[app_c_l205_c5_471f]', 'state_MUX[app_c_l205_c5_471f]', 'to_mem_MUX[app_c_l200_c8_c292]']
136: ['num_msgs_MUX[app_c_l205_c5_471f]', 'state_MUX[app_c_l205_c5_471f]', 'to_mem_MUX[app_c_l200_c8_c292]']
137: ['num_msgs_MUX[app_c_l200_c8_c292]', 'state_MUX[app_c_l200_c8_c292]', 'to_mem_MUX[app_c_l179_c8_1bbb]']
138: ['num_msgs_MUX[app_c_l200_c8_c292]', 'state_MUX[app_c_l200_c8_c292]', 'to_mem_MUX[app_c_l179_c8_1bbb]']
139: ['num_msgs_MUX[app_c_l200_c8_c292]', 'state_MUX[app_c_l200_c8_c292]', 'to_mem_MUX[app_c_l179_c8_1bbb]']
140: ['num_msgs_MUX[app_c_l200_c8_c292]', 'state_MUX[app_c_l200_c8_c292]', 'to_mem_MUX[app_c_l179_c8_1bbb]']
141: ['num_msgs_MUX[app_c_l200_c8_c292]', 'state_MUX[app_c_l200_c8_c292]', 'to_mem_MUX[app_c_l179_c8_1bbb]']
142: ['num_msgs_MUX[app_c_l200_c8_c292]', 'state_MUX[app_c_l200_c8_c292]', 'to_mem_MUX[app_c_l179_c8_1bbb]']
143: ['num_msgs_MUX[app_c_l200_c8_c292]', 'state_MUX[app_c_l200_c8_c292]', 'to_mem_MUX[app_c_l179_c8_1bbb]']
144: ['num_msgs_MUX[app_c_l200_c8_c292]', 'state_MUX[app_c_l200_c8_c292]', 'to_mem_MUX[app_c_l179_c8_1bbb]']
145: ['num_msgs_MUX[app_c_l200_c8_c292]', 'state_MUX[app_c_l200_c8_c292]', 'to_mem_MUX[app_c_l179_c8_1bbb]']
146: ['num_msgs_MUX[app_c_l200_c8_c292]', 'state_MUX[app_c_l200_c8_c292]', 'to_mem_MUX[app_c_l179_c8_1bbb]']
147: ['num_msgs_MUX[app_c_l200_c8_c292]', 'state_MUX[app_c_l200_c8_c292]', 'to_mem_MUX[app_c_l179_c8_1bbb]']
148: ['num_msgs_MUX[app_c_l200_c8_c292]', 'state_MUX[app_c_l200_c8_c292]', 'to_mem_MUX[app_c_l179_c8_1bbb]']
149: ['num_msgs_MUX[app_c_l200_c8_c292]', 'state_MUX[app_c_l200_c8_c292]', 'to_mem_MUX[app_c_l179_c8_1bbb]']
150: ['num_msgs_MUX[app_c_l200_c8_c292]', 'state_MUX[app_c_l200_c8_c292]', 'to_mem_MUX[app_c_l179_c8_1bbb]']
151: ['num_msgs_MUX[app_c_l200_c8_c292]', 'state_MUX[app_c_l200_c8_c292]', 'to_mem_MUX[app_c_l179_c8_1bbb]']
152: ['num_msgs_MUX[app_c_l200_c8_c292]', 'state_MUX[app_c_l200_c8_c292]', 'to_mem_MUX[app_c_l179_c8_1bbb]']
153: ['num_msgs_MUX[app_c_l179_c8_1bbb]', 'state_MUX[app_c_l179_c8_1bbb]', 'to_mem_MUX[app_c_l168_c3_c722]']
154: ['num_msgs_MUX[app_c_l179_c8_1bbb]', 'state_MUX[app_c_l179_c8_1bbb]', 'to_mem_MUX[app_c_l168_c3_c722]']
155: ['num_msgs_MUX[app_c_l179_c8_1bbb]', 'state_MUX[app_c_l179_c8_1bbb]', 'to_mem_MUX[app_c_l168_c3_c722]']
156: ['num_msgs_MUX[app_c_l179_c8_1bbb]', 'state_MUX[app_c_l179_c8_1bbb]', 'to_mem_MUX[app_c_l168_c3_c722]']
157: ['num_msgs_MUX[app_c_l179_c8_1bbb]', 'state_MUX[app_c_l179_c8_1bbb]', 'to_mem_MUX[app_c_l168_c3_c722]']
158: ['num_msgs_MUX[app_c_l179_c8_1bbb]', 'state_MUX[app_c_l179_c8_1bbb]', 'to_mem_MUX[app_c_l168_c3_c722]']
159: ['num_msgs_MUX[app_c_l179_c8_1bbb]', 'state_MUX[app_c_l179_c8_1bbb]', 'to_mem_MUX[app_c_l168_c3_c722]']
160: ['num_msgs_MUX[app_c_l179_c8_1bbb]', 'state_MUX[app_c_l179_c8_1bbb]', 'to_mem_MUX[app_c_l168_c3_c722]']
161: ['num_msgs_MUX[app_c_l179_c8_1bbb]', 'state_MUX[app_c_l179_c8_1bbb]', 'to_mem_MUX[app_c_l168_c3_c722]']
162: ['num_msgs_MUX[app_c_l179_c8_1bbb]', 'state_MUX[app_c_l179_c8_1bbb]', 'to_mem_MUX[app_c_l168_c3_c722]']
163: ['num_msgs_MUX[app_c_l179_c8_1bbb]', 'state_MUX[app_c_l179_c8_1bbb]', 'to_mem_MUX[app_c_l168_c3_c722]']
164: ['num_msgs_MUX[app_c_l179_c8_1bbb]', 'state_MUX[app_c_l179_c8_1bbb]', 'to_mem_MUX[app_c_l168_c3_c722]']
165: ['num_msgs_MUX[app_c_l179_c8_1bbb]', 'state_MUX[app_c_l179_c8_1bbb]', 'to_mem_MUX[app_c_l168_c3_c722]']
166: ['num_msgs_MUX[app_c_l179_c8_1bbb]', 'state_MUX[app_c_l179_c8_1bbb]', 'to_mem_MUX[app_c_l168_c3_c722]']
167: ['num_msgs_MUX[app_c_l179_c8_1bbb]', 'state_MUX[app_c_l179_c8_1bbb]', 'to_mem_MUX[app_c_l168_c3_c722]']
168: ['num_msgs_MUX[app_c_l179_c8_1bbb]', 'state_MUX[app_c_l179_c8_1bbb]', 'to_mem_MUX[app_c_l168_c3_c722]']
169: ['num_msgs_MUX[app_c_l168_c3_c722]', 'state_MUX[app_c_l168_c3_c722]']
170: ['num_msgs_MUX[app_c_l168_c3_c722]', 'state_MUX[app_c_l168_c3_c722]']
171: ['num_msgs_MUX[app_c_l168_c3_c722]', 'state_MUX[app_c_l168_c3_c722]']
172: ['num_msgs_MUX[app_c_l168_c3_c722]', 'state_MUX[app_c_l168_c3_c722]']
173: ['num_msgs_MUX[app_c_l168_c3_c722]', 'state_MUX[app_c_l168_c3_c722]']
174: ['num_msgs_MUX[app_c_l168_c3_c722]', 'state_MUX[app_c_l168_c3_c722]']
175: ['num_msgs_MUX[app_c_l168_c3_c722]', 'state_MUX[app_c_l168_c3_c722]']
176: ['num_msgs_MUX[app_c_l168_c3_c722]', 'state_MUX[app_c_l168_c3_c722]']
177: ['num_msgs_MUX[app_c_l168_c3_c722]', 'state_MUX[app_c_l168_c3_c722]']
178: ['num_msgs_MUX[app_c_l168_c3_c722]', 'state_MUX[app_c_l168_c3_c722]']
179: ['num_msgs_MUX[app_c_l168_c3_c722]', 'state_MUX[app_c_l168_c3_c722]']
180: ['num_msgs_MUX[app_c_l168_c3_c722]', 'state_MUX[app_c_l168_c3_c722]']
181: ['num_msgs_MUX[app_c_l168_c3_c722]', 'state_MUX[app_c_l168_c3_c722]']
182: ['num_msgs_MUX[app_c_l168_c3_c722]', 'state_MUX[app_c_l168_c3_c722]']
183: ['num_msgs_MUX[app_c_l168_c3_c722]', 'state_MUX[app_c_l168_c3_c722]']
184: ['num_msgs_MUX[app_c_l168_c3_c722]', 'state_MUX[app_c_l168_c3_c722]']
185: ['state_MUX[app_c_l222_c3_1a0f]']
186: ['state_MUX[app_c_l222_c3_1a0f]']
187: ['state_MUX[app_c_l222_c3_1a0f]']
188: ['state_MUX[app_c_l222_c3_1a0f]']
189: ['state_MUX[app_c_l222_c3_1a0f]']
190: ['state_MUX[app_c_l222_c3_1a0f]']
191: ['state_MUX[app_c_l222_c3_1a0f]']
192: ['state_MUX[app_c_l222_c3_1a0f]']
193: ['state_MUX[app_c_l222_c3_1a0f]']
194: ['state_MUX[app_c_l222_c3_1a0f]']
195: ['state_MUX[app_c_l222_c3_1a0f]']
196: ['state_MUX[app_c_l222_c3_1a0f]']
197: ['state_MUX[app_c_l222_c3_1a0f]']
198: ['state_MUX[app_c_l222_c3_1a0f]']
199: ['state_MUX[app_c_l222_c3_1a0f]']
200: ['state_MUX[app_c_l222_c3_1a0f]']

Throughput Sweep (Uneventful for simple state machines...)

In more advanced examples you will want to use the auto-pipelining features of PipelineC. This stateful function example cannot be further pipelined, no further latency can be traded off for throughput. Luckily as-written it is expected to meet the UART and DDR clock timings as needed, no further design changes are needed.

================== Beginning Throughput Sweep ================================
Function: led0_module Target MHz: 83.33
Function: led1_module Target MHz: 83.33
Function: led2_module Target MHz: 83.33
Function: led3_module Target MHz: 83.33
Function: uart_module Target MHz: 25.0
Function: uart_rx_mac Target MHz: 25.0
Function: uart_tx_mac Target MHz: 25.0
Function: uart_rx_msg Target MHz: 25.0
Function: uart_tx_msg Target MHz: 25.0
Function: uart_rx_msg_fifo_module Target MHz: 25.0
Function: uart_tx_msg_fifo_module Target MHz: 25.0
Function: xil_mig_module Target MHz: 83.33
Function: app Target MHz: 83.33
Function: app_tieoff Target MHz: 25.0
WARNING: uart_tx_msg_fifo async fifo depth increased to minimum allowed = 16
WARNING: uart_rx_msg_fifo async fifo depth increased to minimum allowed = 16
Starting with blank sweep state...
...determining slicing information for each main function...
led0_module : 0 clocks latency, sliced coarsely...
led1_module : 0 clocks latency, sliced coarsely...
led2_module : 0 clocks latency, sliced coarsely...
led3_module : 0 clocks latency, sliced coarsely...
uart_module : 0 clocks latency, sliced coarsely...
uart_rx_mac : 0 clocks latency, sliced coarsely...
uart_tx_mac : 0 clocks latency, sliced coarsely...
uart_rx_msg : 0 clocks latency, sliced coarsely...
uart_tx_msg : 0 clocks latency, sliced coarsely...
uart_rx_msg_fifo_module : 0 clocks latency, sliced coarsely...
uart_tx_msg_fifo_module : 0 clocks latency, sliced coarsely...
xil_mig_module : 0 clocks latency, sliced coarsely...
app : 0 clocks latency, sliced coarsely...
app_tieoff : 0 clocks latency, sliced coarsely...
Running: /media/1TB/Programs/Linux/Xilinx/Vivado/2019.2/bin/vivado -journal /home/julian/pipelinec_syn_output/top/vivado.jou -log /home/julian/pipelinec_syn_output/top/vivado_2784.log -mode batch -source "/home/julian/pipelinec_syn_output/top/top_2784.tcl"
Clock Goal (MHz): 25.0 , Current MHz: 159.6169193934557 ( 6.265000000000001 ns)
Clock Goal (MHz): 83.33333333333333 , Current MHz: 129.87012987012986 ( 7.7 ns)
Found maximum pipeline latencies...
================== Writing Results of Throughput Sweep ================================
Done.

VHDL wrapper for Vivado

-- Top level file connecting board to PipelineC generated code

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use ieee.numeric_std.all;
library UNISIM;
use UNISIM.VCOMPONENTS.ALL;

-- PipelineC packages
use work.c_structs_pkg.all;

-- Connections to the board, see xdc files, un/commment things as needed
entity board is
  port (
    CLK100MHZ : in std_logic;
    sw : in std_logic_vector(3 downto 0);
    led : out std_logic_vector(3 downto 0);
    uart_rxd_out : out std_logic;
    uart_txd_in : in std_logic;
    ddr3_dq       : inout std_logic_vector(15 downto 0);
    ddr3_dqs_p    : inout std_logic_vector(1 downto 0);
    ddr3_dqs_n    : inout std_logic_vector(1 downto 0);
    ddr3_addr     : out   std_logic_vector(13 downto 0);
    ddr3_ba       : out   std_logic_vector(2 downto 0);
    ddr3_ras_n    : out   std_logic;
    ddr3_cas_n    : out   std_logic;
    ddr3_we_n     : out   std_logic;
    ddr3_reset_n  : out   std_logic;
    ddr3_ck_p     : out   std_logic_vector(0 downto 0); -- Uncomment to use DDR3
    ddr3_ck_n     : out   std_logic_vector(0 downto 0); -- Uncomment to use DDR3
    ddr3_cke      : out   std_logic_vector(0 downto 0);
    ddr3_cs_n     : out   std_logic_vector(0 downto 0);
    ddr3_dm       : out   std_logic_vector(1 downto 0);
    ddr3_odt      : out   std_logic_vector(0 downto 0)
  );
end board;

architecture arch of board is

-- General clocks based off of the board's CLK100MHZ
signal clk_25, clk_50, clk_100, clk_200, clk_400 : std_logic;
signal clks_ready: std_logic;
signal rst : std_logic;
component clks_sys_clk_100
port
 (
  -- Clock out ports
  clk_25          : out    std_logic;
  clk_50          : out    std_logic;
  clk_100         : out    std_logic;
  clk_200         : out    std_logic;
  clk_400         : out    std_logic;
  -- Status and control signals
  locked          : out    std_logic;
  -- Clock in ports
  sys_clk_100     : in     std_logic
 );
end component;

-- DDR clocks based off of the board's CLK100MHZ
signal ddr_sys_clk : std_logic; -- 166.66MHz 
signal clk_166p66 : std_logic;
signal ddr_clks_ready: std_logic;
signal ddr_sys_rst_n : std_logic;
signal ddr_sys_rst : std_logic;
component ddr_clks_sys_clk_100
port
 (
  -- Clock out ports
  ddr_sys_clk          : out    std_logic;
  -- Status and control signals
  locked            : out    std_logic;
  -- Clock in ports
  sys_clk_100           : in     std_logic
 );
end component;

-- The board's DDR3 controller
signal app_addr                  :     std_logic_vector(27 downto 0);
signal app_cmd                   :     std_logic_vector(2 downto 0);
signal app_en                    :     std_logic;
signal app_wdf_data              :     std_logic_vector(127 downto 0);
signal app_wdf_end               :     std_logic;
signal app_wdf_mask              :     std_logic_vector(15 downto 0);
signal app_wdf_wren              :     std_logic;
signal app_rd_data               :    std_logic_vector(127 downto 0);
signal app_rd_data_end           :    std_logic;
signal app_rd_data_valid         :    std_logic;
signal app_rdy                   :    std_logic;
signal app_wdf_rdy               :    std_logic;
signal app_sr_req                :     std_logic;
signal app_ref_req               :     std_logic;
signal app_zq_req                :     std_logic;
signal app_sr_active             :    std_logic;
signal app_ref_ack               :    std_logic;
signal app_zq_ack                :    std_logic;
signal ui_clk                    :    std_logic; -- 83.33MHz 
signal clk_83p33                 :    std_logic;
signal ui_clk_sync_rst           :    std_logic;
signal init_calib_complete       :    std_logic;
component ddr3_0
  port (
      ddr3_dq       : inout std_logic_vector(15 downto 0);
      ddr3_dqs_p    : inout std_logic_vector(1 downto 0);
      ddr3_dqs_n    : inout std_logic_vector(1 downto 0);
      ddr3_addr     : out   std_logic_vector(13 downto 0);
      ddr3_ba       : out   std_logic_vector(2 downto 0);
      ddr3_ras_n    : out   std_logic;
      ddr3_cas_n    : out   std_logic;
      ddr3_we_n     : out   std_logic;
      ddr3_reset_n  : out   std_logic;
      ddr3_ck_p     : out   std_logic_vector(0 downto 0);
      ddr3_ck_n     : out   std_logic_vector(0 downto 0);
      ddr3_cke      : out   std_logic_vector(0 downto 0);
	  ddr3_cs_n     : out   std_logic_vector(0 downto 0);
      ddr3_dm       : out   std_logic_vector(1 downto 0);
      ddr3_odt      : out   std_logic_vector(0 downto 0);
      app_addr                  : in    std_logic_vector(27 downto 0);
      app_cmd                   : in    std_logic_vector(2 downto 0);
      app_en                    : in    std_logic;
      app_wdf_data              : in    std_logic_vector(127 downto 0);
      app_wdf_end               : in    std_logic;
      app_wdf_mask              : in    std_logic_vector(15 downto 0);
      app_wdf_wren              : in    std_logic;
      app_rd_data               : out   std_logic_vector(127 downto 0);
      app_rd_data_end           : out   std_logic;
      app_rd_data_valid         : out   std_logic;
      app_rdy                   : out   std_logic;
      app_wdf_rdy               : out   std_logic;
      app_sr_req                : in    std_logic;
      app_ref_req               : in    std_logic;
      app_zq_req                : in    std_logic;
      app_sr_active             : out   std_logic;
      app_ref_ack               : out   std_logic;
      app_zq_ack                : out   std_logic;
      ui_clk                    : out   std_logic;
      ui_clk_sync_rst           : out   std_logic;
      init_calib_complete       : out   std_logic;
      -- System Clock Ports
      sys_clk_i                 : in    std_logic;
      -- Reference Clock Ports
      clk_ref_i                 : in    std_logic;
      sys_rst                   : in    std_logic -- ACTIVE LOW - PORT NAME IS INCORRECT
  );
end component ddr3_0;
 
-- Internal signals
-- Clocks
signal sys_clk_100 : std_logic;
-- Switches
signal switches_wire : unsigned(3 downto 0);
-- LEDs
signal leds_wire : unsigned(3 downto 0);
-- UART
signal uart_data_in : unsigned(0 downto 0);
signal uart_data_out : unsigned(0 downto 0);
-- DDR3
signal mig_to_app : xil_mig_to_app_t;
signal app_to_mig : xil_app_to_mig_t;

begin

-- Connect board's CLK100MHZ pin to internal global clock buffer network
CLK100MHZ_bufg_inst: BUFG 
port map (
    I => CLK100MHZ, 
    O => sys_clk_100
);

-- General clocks based off of the board's CLK100MHZ
clks_sys_clk_100_inst : clks_sys_clk_100
   port map ( 
  -- Clock out ports  
   clk_25 => clk_25,
   clk_50 => clk_50,
   clk_100 => clk_100,
   clk_200 => clk_200,
   clk_400 => clk_400,
  -- Status and control signals                
   locked => clks_ready,
   -- Clock in ports
   sys_clk_100 => sys_clk_100
 );
-- Hold in reset until clocks are ready
rst <= not clks_ready;

-- DDR clocks based off of the board's CLK100MHZ 
ddr_clks_sys_clk_100_inst : ddr_clks_sys_clk_100
   port map ( 
   ddr_sys_clk => ddr_sys_clk, -- 166.66MHz 
   locked => ddr_clks_ready,
   sys_clk_100 => sys_clk_100
 );
clk_166p66 <= ddr_sys_clk;
-- Hold in reset until clocks are ready
ddr_sys_rst <= rst or not ddr_clks_ready;
ddr_sys_rst_n <= not ddr_sys_rst;
 
-- The board's DDR3 controller
 ddr3_0_inst : ddr3_0
     port map (
        -- Memory interface ports
        ddr3_addr                      => ddr3_addr,
        ddr3_ba                        => ddr3_ba,
        ddr3_cas_n                     => ddr3_cas_n,
        ddr3_ck_n                      => ddr3_ck_n,
        ddr3_ck_p                      => ddr3_ck_p,
        ddr3_cke                       => ddr3_cke,
        ddr3_ras_n                     => ddr3_ras_n,
        ddr3_reset_n                   => ddr3_reset_n,
        ddr3_we_n                      => ddr3_we_n,
        ddr3_dq                        => ddr3_dq,
        ddr3_dqs_n                     => ddr3_dqs_n,
        ddr3_dqs_p                     => ddr3_dqs_p,
        init_calib_complete            => init_calib_complete,
 	   ddr3_cs_n                      => ddr3_cs_n,
        ddr3_dm                        => ddr3_dm,
        ddr3_odt                       => ddr3_odt,
        -- Application interface ports
        app_addr                       => app_addr,
        app_cmd                        => app_cmd,
        app_en                         => app_en,
        app_wdf_data                   => app_wdf_data,
        app_wdf_end                    => app_wdf_end,
        app_wdf_wren                   => app_wdf_wren,
        app_rd_data                    => app_rd_data,
        app_rd_data_end                => app_rd_data_end,
        app_rd_data_valid              => app_rd_data_valid,
        app_rdy                        => app_rdy,
        app_wdf_rdy                    => app_wdf_rdy,
        app_sr_req                     => app_sr_req,
        app_ref_req                    => app_ref_req,
        app_zq_req                     => app_zq_req,
        app_sr_active                  => app_sr_active,
        app_ref_ack                    => app_ref_ack,
        app_zq_ack                     => app_zq_ack,
        ui_clk                         => ui_clk, -- 83.33MHz
        ui_clk_sync_rst                => ui_clk_sync_rst,
        app_wdf_mask                   => app_wdf_mask,
        -- System Clock Ports
        sys_clk_i                      => ddr_sys_clk, -- 166.66MHz 
        -- Reference Clock Ports
        clk_ref_i                      => clk_200, -- Ref always 200MHz
        sys_rst                        => ddr_sys_rst_n -- ACTIVE LOW - PORT NAME IS INCORRECT
     );
clk_83p33 <= ui_clk;

-- Un/pack IO struct types to/from flattened SLV board pins
-- TODO Code gen this...
-- Commented out wires as necessary
process(all) begin
    -- LEDs
    led <= std_logic_vector(leds_wire);       
    -- Switches
    switches_wire <= unsigned(sw);
    -- UART
    uart_data_in(0) <= uart_txd_in;
    uart_rxd_out <= uart_data_out(0);
    -- DDR3
    app_addr <= std_logic_vector(app_to_mig.addr);
    app_cmd  <= std_logic_vector(app_to_mig.cmd);
    app_en  <= std_logic(app_to_mig.en(0));
    for byte_i in 0 to app_wdf_mask'length-1 loop
		app_wdf_data(((byte_i+1)*8)-1 downto (byte_i*8)) <= std_logic_vector(app_to_mig.wdf_data(byte_i));
	end loop;
    app_wdf_end  <= std_logic(app_to_mig.wdf_end(0));
    for byte_i in 0 to app_wdf_mask'length-1 loop
		app_wdf_mask(byte_i) <= std_logic(app_to_mig.wdf_mask(byte_i)(0));
	end loop;
    app_wdf_wren <= std_logic(app_to_mig.wdf_wren(0));
    for byte_i in 0 to app_wdf_mask'length-1 loop
        mig_to_app.rd_data(byte_i) <= unsigned(app_rd_data(((byte_i+1)*8)-1 downto (byte_i*8)));
	end loop;
    mig_to_app.rd_data_end(0) <= app_rd_data_end; 
    mig_to_app.rd_data_valid(0) <= app_rd_data_valid;
    mig_to_app.rdy(0) <= app_rdy;
    mig_to_app.wdf_rdy(0) <= app_wdf_rdy;
    app_sr_req   <= std_logic(app_to_mig.sr_req(0));
    app_ref_req  <= std_logic(app_to_mig.ref_req(0));
    app_zq_req   <= std_logic(app_to_mig.zq_req(0));
    mig_to_app.sr_active(0) <= app_sr_active;
    mig_to_app.ref_ack(0) <= app_ref_ack;
    mig_to_app.zq_ack(0)  <= app_zq_ack;
    mig_to_app.ui_clk_sync_rst(0) <= ui_clk_sync_rst;
    mig_to_app.init_calib_complete(0) <= init_calib_complete;
end process;
    
-- The PipelineC generated entity
top_inst : entity work.top port map (    
    -- Main function clocks
    clk_25p0 => clk_25,
    --clk_50p0 => clk_50,
    clk_83p33 => clk_83p33,
    --clk_100p0 => clk_100,
    --clk_166p66 => clk_166p66,
    --clk_200p0 => clk_200,
    --clk_400p0 => clk_400,
        
    -- Each main funciton's inputs and outputs
    
    -- LEDs
    led0_module_return_output(0) => leds_wire(0),
    led1_module_return_output(0) => leds_wire(1),
    led2_module_return_output(0) => leds_wire(2),
    led3_module_return_output(0) => leds_wire(3),
    
    -- Switches
    --switches_module_sw => switches_wire
    
    -- UART
    uart_module_data_in => uart_data_in,
    uart_module_return_output => uart_data_out,
    
    -- DDR3
    xil_mig_module_mig_to_app => mig_to_app,
    xil_mig_module_return_output => app_to_mig
);

end arch;

Vivado Results

Resource usage: resources