Add SPV_NV_raw_access_chains (#417)

Co-authored-by: Hans-Kristian Arntzen <post@arntzen-software.no>
KhronosGroup · Mar 1, 2024 · 8b246ff · 8b246ff
1 parent b73e168
commit 8b246ff
Show file tree

Hide file tree

Showing 12 changed files with 187 additions and 0 deletions.
diff --git a/include/spirv/unified1/spirv.bf b/include/spirv/unified1/spirv.bf
@@ -1160,6 +1160,7 @@ namespace Spv
  RayQueryPositionFetchKHR = 5391,
  AtomicFloat16VectorNV = 5404,
  RayTracingDisplacementMicromapNV = 5409,
+ RawAccessChainsNV = 5414,
  SubgroupShuffleINTEL = 5568,
  SubgroupBufferBlockIOINTEL = 5569,
  SubgroupImageBlockIOINTEL = 5570,
@@ -1409,6 +1410,19 @@ namespace Spv
  AutoINTEL = 0,
  }
 
+ [AllowDuplicates, CRepr] public enum RawAccessChainOperandsShift
+ {
+ RobustnessPerComponentNV = 0,
+ RobustnessPerElementNV = 1,
+ }
+
+ [AllowDuplicates, CRepr] public enum RawAccessChainOperandsMask
+ {
+ MaskNone = 0,
+ RobustnessPerComponentNV = 0x00000001,
+ RobustnessPerElementNV = 0x00000002,
+ }
+
  [AllowDuplicates, CRepr] public enum Op
  {
  OpNop = 0,
@@ -1887,6 +1901,7 @@ namespace Spv
  OpConvertUToSampledImageNV = 5395,
  OpConvertSampledImageToUNV = 5396,
  OpSamplerImageAddressingModeNV = 5397,
+ OpRawAccessChainNV = 5398,
  OpSubgroupShuffleINTEL = 5571,
  OpSubgroupShuffleDownINTEL = 5572,
  OpSubgroupShuffleUpINTEL = 5573,

diff --git a/include/spirv/unified1/spirv.core.grammar.json b/include/spirv/unified1/spirv.core.grammar.json
@@ -6251,6 +6251,24 @@
  "capabilities" : [ "BindlessTextureNV" ],
  "version" : "None"
  },
+ {
+ "opname" : "OpRawAccessChainNV",
+ "class" : "Memory",
+ "opcode" : 5398,
+ "operands" : [
+ { "kind" : "IdResultType" },
+ { "kind" : "IdResult" },
+ { "kind" : "IdRef", "name" : "'Base'" },
+ { "kind" : "IdRef", "name" : "'Byte stride'" },
+ { "kind" : "IdRef", "name" : "'Element index'" },
+ { "kind" : "IdRef", "name" : "'Byte offset'" },
+ { "kind" : "RawAccessChainOperands", "quantifier" : "?" }
+ ],
+ "capabilities" : [
+ "RawAccessChainsNV"
+ ],
+ "version" : "None"
+ },
  {
  "opname" : "OpSubgroupShuffleINTEL",
  "class" : "Group",
@@ -10667,6 +10685,28 @@
  }
  ]
  },
+ {
+ "category" : "BitEnum",
+ "kind" : "RawAccessChainOperands",
+ "enumerants" : [
+ {
+ "enumerant" : "None",
+ "value" : "0x0000"
+ },
+ {
+ "enumerant" : "RobustnessPerComponentNV",
+ "value" : "0x0001",
+ "capabilities" : [ "RawAccessChainsNV" ],
+ "version" : "None"
+ },
+ {
+ "enumerant" : "RobustnessPerElementNV",
+ "value" : "0x0002",
+ "capabilities" : [ "RawAccessChainsNV" ],
+ "version" : "None"
+ }
+ ]
+ },
  {
  "category" : "ValueEnum",
  "kind" : "SourceLanguage",
@@ -16083,6 +16123,12 @@
  "extensions" : [ "SPV_NV_displacement_micromap" ],
  "version" : "None"
  },
+ {
+ "enumerant" : "RawAccessChainsNV",
+ "value" : 5414,
+ "extensions" : [ "SPV_NV_raw_access_chains" ],
+ "version" : "None"
+ },
  {
  "enumerant" : "SubgroupShuffleINTEL",
  "value" : 5568,

diff --git a/include/spirv/unified1/spirv.cs b/include/spirv/unified1/spirv.cs
@@ -1159,6 +1159,7 @@ public enum Capability
  RayQueryPositionFetchKHR = 5391,
  AtomicFloat16VectorNV = 5404,
  RayTracingDisplacementMicromapNV = 5409,
+ RawAccessChainsNV = 5414,
  SubgroupShuffleINTEL = 5568,
  SubgroupBufferBlockIOINTEL = 5569,
  SubgroupImageBlockIOINTEL = 5570,
@@ -1408,6 +1409,19 @@ public enum NamedMaximumNumberOfRegisters
  AutoINTEL = 0,
  }
 
+ public enum RawAccessChainOperandsShift
+ {
+ RobustnessPerComponentNV = 0,
+ RobustnessPerElementNV = 1,
+ }
+
+ public enum RawAccessChainOperandsMask
+ {
+ MaskNone = 0,
+ RobustnessPerComponentNV = 0x00000001,
+ RobustnessPerElementNV = 0x00000002,
+ }
+
  public enum Op
  {
  OpNop = 0,
@@ -1886,6 +1900,7 @@ public enum Op
  OpConvertUToSampledImageNV = 5395,
  OpConvertSampledImageToUNV = 5396,
  OpSamplerImageAddressingModeNV = 5397,
+ OpRawAccessChainNV = 5398,
  OpSubgroupShuffleINTEL = 5571,
  OpSubgroupShuffleDownINTEL = 5572,
  OpSubgroupShuffleUpINTEL = 5573,

diff --git a/include/spirv/unified1/spirv.h b/include/spirv/unified1/spirv.h
@@ -1159,6 +1159,7 @@ typedef enum SpvCapability_ {
  SpvCapabilityRayQueryPositionFetchKHR = 5391,
  SpvCapabilityAtomicFloat16VectorNV = 5404,
  SpvCapabilityRayTracingDisplacementMicromapNV = 5409,
+ SpvCapabilityRawAccessChainsNV = 5414,
  SpvCapabilitySubgroupShuffleINTEL = 5568,
  SpvCapabilitySubgroupBufferBlockIOINTEL = 5569,
  SpvCapabilitySubgroupImageBlockIOINTEL = 5570,
@@ -1406,6 +1407,18 @@ typedef enum SpvNamedMaximumNumberOfRegisters_ {
  SpvNamedMaximumNumberOfRegistersMax = 0x7fffffff,
 } SpvNamedMaximumNumberOfRegisters;
 
+typedef enum SpvRawAccessChainOperandsShift_ {
+ SpvRawAccessChainOperandsRobustnessPerComponentNVShift = 0,
+ SpvRawAccessChainOperandsRobustnessPerElementNVShift = 1,
+ SpvRawAccessChainOperandsMax = 0x7fffffff,
+} SpvRawAccessChainOperandsShift;
+
+typedef enum SpvRawAccessChainOperandsMask_ {
+ SpvRawAccessChainOperandsMaskNone = 0,
+ SpvRawAccessChainOperandsRobustnessPerComponentNVMask = 0x00000001,
+ SpvRawAccessChainOperandsRobustnessPerElementNVMask = 0x00000002,
+} SpvRawAccessChainOperandsMask;
+
 typedef enum SpvOp_ {
  SpvOpNop = 0,
  SpvOpUndef = 1,
@@ -1883,6 +1896,7 @@ typedef enum SpvOp_ {
  SpvOpConvertUToSampledImageNV = 5395,
  SpvOpConvertSampledImageToUNV = 5396,
  SpvOpSamplerImageAddressingModeNV = 5397,
+ SpvOpRawAccessChainNV = 5398,
  SpvOpSubgroupShuffleINTEL = 5571,
  SpvOpSubgroupShuffleDownINTEL = 5572,
  SpvOpSubgroupShuffleUpINTEL = 5573,
@@ -2617,6 +2631,7 @@ inline void SpvHasResultAndType(SpvOp opcode, bool *hasResult, bool *hasResultTy
  case SpvOpConvertUToSampledImageNV: *hasResult = true; *hasResultType = true; break;
  case SpvOpConvertSampledImageToUNV: *hasResult = true; *hasResultType = true; break;
  case SpvOpSamplerImageAddressingModeNV: *hasResult = false; *hasResultType = false; break;
+ case SpvOpRawAccessChainNV: *hasResult = true; *hasResultType = true; break;
  case SpvOpSubgroupShuffleINTEL: *hasResult = true; *hasResultType = true; break;
  case SpvOpSubgroupShuffleDownINTEL: *hasResult = true; *hasResultType = true; break;
  case SpvOpSubgroupShuffleUpINTEL: *hasResult = true; *hasResultType = true; break;

diff --git a/include/spirv/unified1/spirv.hpp b/include/spirv/unified1/spirv.hpp
@@ -1155,6 +1155,7 @@ enum Capability {
  CapabilityRayQueryPositionFetchKHR = 5391,
  CapabilityAtomicFloat16VectorNV = 5404,
  CapabilityRayTracingDisplacementMicromapNV = 5409,
+ CapabilityRawAccessChainsNV = 5414,
  CapabilitySubgroupShuffleINTEL = 5568,
  CapabilitySubgroupBufferBlockIOINTEL = 5569,
  CapabilitySubgroupImageBlockIOINTEL = 5570,
@@ -1402,6 +1403,18 @@ enum NamedMaximumNumberOfRegisters {
  NamedMaximumNumberOfRegistersMax = 0x7fffffff,
 };
 
+enum RawAccessChainOperandsShift {
+ RawAccessChainOperandsRobustnessPerComponentNVShift = 0,
+ RawAccessChainOperandsRobustnessPerElementNVShift = 1,
+ RawAccessChainOperandsMax = 0x7fffffff,
+};
+
+enum RawAccessChainOperandsMask {
+ RawAccessChainOperandsMaskNone = 0,
+ RawAccessChainOperandsRobustnessPerComponentNVMask = 0x00000001,
+ RawAccessChainOperandsRobustnessPerElementNVMask = 0x00000002,
+};
+
 enum Op {
  OpNop = 0,
  OpUndef = 1,
@@ -1879,6 +1892,7 @@ enum Op {
  OpConvertUToSampledImageNV = 5395,
  OpConvertSampledImageToUNV = 5396,
  OpSamplerImageAddressingModeNV = 5397,
+ OpRawAccessChainNV = 5398,
  OpSubgroupShuffleINTEL = 5571,
  OpSubgroupShuffleDownINTEL = 5572,
  OpSubgroupShuffleUpINTEL = 5573,
@@ -2613,6 +2627,7 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) {
  case OpConvertUToSampledImageNV: *hasResult = true; *hasResultType = true; break;
  case OpConvertSampledImageToUNV: *hasResult = true; *hasResultType = true; break;
  case OpSamplerImageAddressingModeNV: *hasResult = false; *hasResultType = false; break;
+ case OpRawAccessChainNV: *hasResult = true; *hasResultType = true; break;
  case OpSubgroupShuffleINTEL: *hasResult = true; *hasResultType = true; break;
  case OpSubgroupShuffleDownINTEL: *hasResult = true; *hasResultType = true; break;
  case OpSubgroupShuffleUpINTEL: *hasResult = true; *hasResultType = true; break;
@@ -2917,6 +2932,10 @@ inline CooperativeMatrixOperandsMask operator|(CooperativeMatrixOperandsMask a,
 inline CooperativeMatrixOperandsMask operator&(CooperativeMatrixOperandsMask a, CooperativeMatrixOperandsMask b) { return CooperativeMatrixOperandsMask(unsigned(a) & unsigned(b)); }
 inline CooperativeMatrixOperandsMask operator^(CooperativeMatrixOperandsMask a, CooperativeMatrixOperandsMask b) { return CooperativeMatrixOperandsMask(unsigned(a) ^ unsigned(b)); }
 inline CooperativeMatrixOperandsMask operator~(CooperativeMatrixOperandsMask a) { return CooperativeMatrixOperandsMask(~unsigned(a)); }
+inline RawAccessChainOperandsMask operator|(RawAccessChainOperandsMask a, RawAccessChainOperandsMask b) { return RawAccessChainOperandsMask(unsigned(a) | unsigned(b)); }
+inline RawAccessChainOperandsMask operator&(RawAccessChainOperandsMask a, RawAccessChainOperandsMask b) { return RawAccessChainOperandsMask(unsigned(a) & unsigned(b)); }
+inline RawAccessChainOperandsMask operator^(RawAccessChainOperandsMask a, RawAccessChainOperandsMask b) { return RawAccessChainOperandsMask(unsigned(a) ^ unsigned(b)); }
+inline RawAccessChainOperandsMask operator~(RawAccessChainOperandsMask a) { return RawAccessChainOperandsMask(~unsigned(a)); }
 
 } // end namespace spv
 

diff --git a/include/spirv/unified1/spirv.hpp11 b/include/spirv/unified1/spirv.hpp11
@@ -1155,6 +1155,7 @@ enum class Capability : unsigned {
  RayQueryPositionFetchKHR = 5391,
  AtomicFloat16VectorNV = 5404,
  RayTracingDisplacementMicromapNV = 5409,
+ RawAccessChainsNV = 5414,
  SubgroupShuffleINTEL = 5568,
  SubgroupBufferBlockIOINTEL = 5569,
  SubgroupImageBlockIOINTEL = 5570,
@@ -1402,6 +1403,18 @@ enum class NamedMaximumNumberOfRegisters : unsigned {
  Max = 0x7fffffff,
 };
 
+enum class RawAccessChainOperandsShift : unsigned {
+ RobustnessPerComponentNV = 0,
+ RobustnessPerElementNV = 1,
+ Max = 0x7fffffff,
+};
+
+enum class RawAccessChainOperandsMask : unsigned {
+ MaskNone = 0,
+ RobustnessPerComponentNV = 0x00000001,
+ RobustnessPerElementNV = 0x00000002,
+};
+
 enum class Op : unsigned {
  OpNop = 0,
  OpUndef = 1,
@@ -1879,6 +1892,7 @@ enum class Op : unsigned {
  OpConvertUToSampledImageNV = 5395,
  OpConvertSampledImageToUNV = 5396,
  OpSamplerImageAddressingModeNV = 5397,
+ OpRawAccessChainNV = 5398,
  OpSubgroupShuffleINTEL = 5571,
  OpSubgroupShuffleDownINTEL = 5572,
  OpSubgroupShuffleUpINTEL = 5573,
@@ -2613,6 +2627,7 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) {
  case Op::OpConvertUToSampledImageNV: *hasResult = true; *hasResultType = true; break;
  case Op::OpConvertSampledImageToUNV: *hasResult = true; *hasResultType = true; break;
  case Op::OpSamplerImageAddressingModeNV: *hasResult = false; *hasResultType = false; break;
+ case Op::OpRawAccessChainNV: *hasResult = true; *hasResultType = true; break;
  case Op::OpSubgroupShuffleINTEL: *hasResult = true; *hasResultType = true; break;
  case Op::OpSubgroupShuffleDownINTEL: *hasResult = true; *hasResultType = true; break;
  case Op::OpSubgroupShuffleUpINTEL: *hasResult = true; *hasResultType = true; break;
@@ -2917,6 +2932,10 @@ constexpr CooperativeMatrixOperandsMask operator|(CooperativeMatrixOperandsMask
 constexpr CooperativeMatrixOperandsMask operator&(CooperativeMatrixOperandsMask a, CooperativeMatrixOperandsMask b) { return CooperativeMatrixOperandsMask(unsigned(a) & unsigned(b)); }
 constexpr CooperativeMatrixOperandsMask operator^(CooperativeMatrixOperandsMask a, CooperativeMatrixOperandsMask b) { return CooperativeMatrixOperandsMask(unsigned(a) ^ unsigned(b)); }
 constexpr CooperativeMatrixOperandsMask operator~(CooperativeMatrixOperandsMask a) { return CooperativeMatrixOperandsMask(~unsigned(a)); }
+constexpr RawAccessChainOperandsMask operator|(RawAccessChainOperandsMask a, RawAccessChainOperandsMask b) { return RawAccessChainOperandsMask(unsigned(a) | unsigned(b)); }
+constexpr RawAccessChainOperandsMask operator&(RawAccessChainOperandsMask a, RawAccessChainOperandsMask b) { return RawAccessChainOperandsMask(unsigned(a) & unsigned(b)); }
+constexpr RawAccessChainOperandsMask operator^(RawAccessChainOperandsMask a, RawAccessChainOperandsMask b) { return RawAccessChainOperandsMask(unsigned(a) ^ unsigned(b)); }
+constexpr RawAccessChainOperandsMask operator~(RawAccessChainOperandsMask a) { return RawAccessChainOperandsMask(~unsigned(a)); }
 
 } // end namespace spv
 

diff --git a/include/spirv/unified1/spirv.json b/include/spirv/unified1/spirv.json
@@ -1132,6 +1132,7 @@
  "RayQueryPositionFetchKHR": 5391,
  "AtomicFloat16VectorNV": 5404,
  "RayTracingDisplacementMicromapNV": 5409,
+ "RawAccessChainsNV": 5414,
  "SubgroupShuffleINTEL": 5568,
  "SubgroupBufferBlockIOINTEL": 5569,
  "SubgroupImageBlockIOINTEL": 5570,
@@ -1400,6 +1401,15 @@
  "AutoINTEL": 0
  }
  },
+ {
+ "Name": "RawAccessChainOperands",
+ "Type": "Bit",
+ "Values":
+ {
+ "RobustnessPerComponentNV": 0,
+ "RobustnessPerElementNV": 1
+ }
+ },
  {
  "Name": "Op",
  "Type": "Value",
@@ -1881,6 +1891,7 @@
  "OpConvertUToSampledImageNV": 5395,
  "OpConvertSampledImageToUNV": 5396,
  "OpSamplerImageAddressingModeNV": 5397,
+ "OpRawAccessChainNV": 5398,
  "OpSubgroupShuffleINTEL": 5571,
  "OpSubgroupShuffleDownINTEL": 5572,
  "OpSubgroupShuffleUpINTEL": 5573,

diff --git a/include/spirv/unified1/spirv.lua b/include/spirv/unified1/spirv.lua
@@ -1117,6 +1117,7 @@ spv = {
  RayQueryPositionFetchKHR = 5391,
  AtomicFloat16VectorNV = 5404,
  RayTracingDisplacementMicromapNV = 5409,
+ RawAccessChainsNV = 5414,
  SubgroupShuffleINTEL = 5568,
  SubgroupBufferBlockIOINTEL = 5569,
  SubgroupImageBlockIOINTEL = 5570,
@@ -1345,6 +1346,17 @@ spv = {
  AutoINTEL = 0,
  },
 
+ RawAccessChainOperandsShift = {
+ RobustnessPerComponentNV = 0,
+ RobustnessPerElementNV = 1,
+ },
+
+ RawAccessChainOperandsMask = {
+ MaskNone = 0,
+ RobustnessPerComponentNV = 0x00000001,
+ RobustnessPerElementNV = 0x00000002,
+ },
+
  Op = {
  OpNop = 0,
  OpUndef = 1,
@@ -1822,6 +1834,7 @@ spv = {
  OpConvertUToSampledImageNV = 5395,
  OpConvertSampledImageToUNV = 5396,
  OpSamplerImageAddressingModeNV = 5397,
+ OpRawAccessChainNV = 5398,
  OpSubgroupShuffleINTEL = 5571,
  OpSubgroupShuffleDownINTEL = 5572,
  OpSubgroupShuffleUpINTEL = 5573,

diff --git a/include/spirv/unified1/spirv.py b/include/spirv/unified1/spirv.py
@@ -1117,6 +1117,7 @@
  'RayQueryPositionFetchKHR' : 5391,
  'AtomicFloat16VectorNV' : 5404,
  'RayTracingDisplacementMicromapNV' : 5409,
+ 'RawAccessChainsNV' : 5414,
  'SubgroupShuffleINTEL' : 5568,
  'SubgroupBufferBlockIOINTEL' : 5569,
  'SubgroupImageBlockIOINTEL' : 5570,
@@ -1345,6 +1346,17 @@
  'AutoINTEL' : 0,
  },
 
+ 'RawAccessChainOperandsShift' : {
+ 'RobustnessPerComponentNV' : 0,
+ 'RobustnessPerElementNV' : 1,
+ },
+
+ 'RawAccessChainOperandsMask' : {
+ 'MaskNone' : 0,
+ 'RobustnessPerComponentNV' : 0x00000001,
+ 'RobustnessPerElementNV' : 0x00000002,
+ },
+
  'Op' : {
  'OpNop' : 0,
  'OpUndef' : 1,
@@ -1822,6 +1834,7 @@
  'OpConvertUToSampledImageNV' : 5395,
  'OpConvertSampledImageToUNV' : 5396,
  'OpSamplerImageAddressingModeNV' : 5397,
+ 'OpRawAccessChainNV' : 5398,
  'OpSubgroupShuffleINTEL' : 5571,
  'OpSubgroupShuffleDownINTEL' : 5572,
  'OpSubgroupShuffleUpINTEL' : 5573,