Fix typos (#167)

src/f64x2_.rs

@@ -1609,7 +1609,7 @@ impl f64x2 {
     cast_mut(self)
   }
 
-  /// Converts the lower two i32 lanes to two f64 lanes (and dropping ther higher two i32 lanes)
+  /// Converts the lower two i32 lanes to two f64 lanes (and dropping the higher two i32 lanes)
   #[inline]
   pub fn from_i32x4_lower2(v: i32x4) -> Self {
     pick! {
@@ -1630,7 +1630,7 @@ impl f64x2 {
 }
 
 impl From<i32x4> for f64x2 {
-  /// Converts the lower two i32 lanes to two f64 lanes (and dropping ther higher two i32 lanes)
+  /// Converts the lower two i32 lanes to two f64 lanes (and dropping the higher two i32 lanes)
   #[inline]
   fn from(v: i32x4) -> Self {
     Self::from_i32x4_lower2(v)

src/i16x16_.rs

@@ -505,7 +505,7 @@ impl i16x16 {
     }
   }
 
-  /// Multiply and scale equivilent to ((self * rhs) + 0x4000) >> 15 on each
+  /// Multiply and scale equivalent to ((self * rhs) + 0x4000) >> 15 on each
   /// lane, effectively multiplying by a 16 bit fixed point number between -1
   /// and 1. This corresponds to the following instructions:
   /// - vqrdmulhq_n_s16 instruction on neon
@@ -527,7 +527,7 @@ impl i16x16 {
     }
   }
 
-  /// Multiply and scale equivilent to ((self * rhs) + 0x4000) >> 15 on each
+  /// Multiply and scale equivalent to ((self * rhs) + 0x4000) >> 15 on each
   /// lane, effectively multiplying by a 16 bit fixed point number between -1
   /// and 1. This corresponds to the following instructions:
   /// - vqrdmulhq_n_s16 instruction on neon

src/i16x8_.rs

@@ -921,7 +921,7 @@ impl i16x8 {
     }
   }
 
-  /// Multiply and scale equivilent to ((self * rhs) + 0x4000) >> 15 on each
+  /// Multiply and scale equivalent to ((self * rhs) + 0x4000) >> 15 on each
   /// lane, effectively multiplying by a 16 bit fixed point number between -1
   /// and 1. This corresponds to the following instructions:
   /// - vqrdmulhq_s16 instruction on neon

src/i8x32_.rs

@@ -336,7 +336,7 @@ impl i8x32 {
   /// The indices i in range [0, 15] select the i-th element of `self`. For indices
   /// outside of the range the resulting lane is 0.
   ///
-  /// This note that is the equivlent of two parallel swizzle operations on the two halves of the vector,
+  /// This note that is the equivalent of two parallel swizzle operations on the two halves of the vector,
   /// and the indexes each refer to the corresponding half.
   #[inline]
   pub fn swizzle_half(self, rhs: i8x32) -> i8x32 {

tests/all_tests/t_usefulness.rs

@@ -209,7 +209,7 @@ fn test_dequantize_and_idct_i16() {
 /// Implement JPEG IDCT using i32x8. This is most similar to the scalar
 /// libjpeg version which has slightly different rounding propertis than the 16
 /// bit version. Some decoders are forced to use this if they want bit-by-bit
-/// compability across all architectures.
+/// compatibility across all architectures.
 #[test]
 fn test_dequantize_and_idct_i32() {
   fn to_fixed(x: f32) -> i32 {