updated riscv_test case for simx and rtlsim drivers

MichaelJSr · Oct 9, 2024 · 3334f53 · 3334f53
1 parent 0b3f423
commit 3334f53
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Showing 2 changed files with 2 additions and 8 deletions.
diff --git a/sim/rtlsim/main.cpp b/sim/rtlsim/main.cpp
@@ -100,8 +100,5 @@ int main(int argc, char **argv) {
 	// read exitcode from @MPM.1
 	ram.read(&exitcode, (IO_MPM_ADDR + 8), 4);
 
-	if (riscv_test) {
-		return (1 - exitcode);
-	}
-	return exitcode;
+	return (riscv_test ? 13 - exitcode : exitcode);
 }
diff --git a/sim/simx/main.cpp b/sim/simx/main.cpp
@@ -125,8 +125,5 @@ int main(int argc, char **argv) {
     ram.read(&exitcode, (IO_MPM_ADDR + 8), 4);
   }
 
-  if (riscv_test) {
-    return (13 - exitcode); // temporary fix for riscv vector tests
-  }
-  return exitcode;
+  return (riscv_test ? 13 - exitcode : exitcode);
 }