Warnings

This page is a loose collection of circumstances in which CoreDSL 2 frontends should emit warnings to prevent programmer errors.

Literals

• Signed Verilog-style literals with a large unsigned value may actually represent a negative value, as in 6'sd42: 42 fits in 6 bits, but the MSB is set, so the represented decimal value is -22.

Expressions

• Bitwise operations (|, &, ^) with differently-sized operands. These are valid in CoreDSL 2, but should be uncommon in practice. The programmer can express intend by using an explicit cast.
• Shifts that potentially shift all bits out of the result value, because the shift amount is larger than the left operand's bit size (in case of literals). If the right operand is a variable, then the largest value representable by its type could be checked, though this might lead to too many false positives.
• Shifts with a potentially negative shift amount. The direction-flip-semantics ensure that no undefined behavior occurs at runtime, but are probably not actively exploited by the programmer.

Elaboration

• When parameter declarations with the same name and type, but occuring in disjoint parts of the ISA hierarchy, are merged.